[llvm] [X86][MC] Support encoding/decoding for APX variant ADD/SUB/ADC/SBB/OR/XOR instructions (PR #76319)

[Shengchen Kan via llvm-commits]

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@@ -1169,7 +1169,11 @@ static int getInstructionID(struct InternalInstruction *insn,
         attrMask |= ATTR_EVEXKZ;
       if (bFromEVEX4of4(insn->vectorExtensionPrefix[3]))
         attrMask |= ATTR_EVEXB;
-      if (aaaFromEVEX4of4(insn->vectorExtensionPrefix[3]))
+      // nf bit is the MSB of aaa
+      if (nfFromEVEX4of4(insn->vectorExtensionPrefix[3]) &&
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KanRobert wrote:

It's a long time issue...
It means extracting NF bit from the 4th byte of EVEX prefix, which is 4-byte long.

If you have a good suggestion for these names, we can create a NFC patch for it.



https://github.com/llvm/llvm-project/pull/76319