[llvm] [X86][MC] Support encoding/decoding for APX variant ADD/SUB/ADC/SBB/OR/XOR instructions (PR #76319)

Phoebe Wang via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 26 23:55:00 PST 2023


================
@@ -172,7 +172,7 @@ enum { PD = 1, XS = 2, XD = 3, PS = 4 };
 enum { VEX = 1, XOP = 2, EVEX = 3 };
 enum { OpSize16 = 1, OpSize32 = 2 };
 enum { AdSize16 = 1, AdSize32 = 2, AdSize64 = 3 };
-enum { ExplicitREX2 = 1 };
+enum { ExplicitREX2 = 1, ExplicitVEX = 2, ExplicitEVEX = 3 };
----------------
phoebewang wrote:

Where `ExplicitVEX` used in this patch?

https://github.com/llvm/llvm-project/pull/76319


More information about the llvm-commits mailing list