[compiler-rt] asan_static x86-64: Support 64-bit ASAN_SHADOW_OFFSET_CONST (PR #75748)

Dimitry Andric via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 24 14:35:52 PST 2023


DimitryAndric wrote:

Looks like after this, on FreeBSD 15-CURRENT, I get a whole bunch of these errors now:

```
FAILED: compiler-rt/lib/asan/CMakeFiles/RTAsan_static.x86_64.dir/asan_rtl_x86_64.S.o
/home/dim/obj/llvmorg-18-init-15666-g1e710cfc8091-freebsd15-amd64-ninja-clang-rel-1/./bin/clang -target x86_64-unknown-freebsd15.0 -D_DEBUG -D_GLIBCXX_ASSERTIONS -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/share/dim/src/llvm/llvm-project/compiler-rt/lib/asan/.. -fPIC -O3 -DNDEBUG -m64 -fPIC -fno-builtin -fno-exceptions -fomit-frame-pointer -funwind-tables -fno-stack-protector -fno-sanitize=safe-stack -fvisibility=hidden -fno-lto -Wthread-safety -Wthread-safety-reference -Wthread-safety-beta -O3 -gline-tables-only -Wno-gnu -Wno-variadic-macros -Wno-c99-extensions -nostdinc++ -fno-rtti -Wno-format -MD -MT compiler-rt/lib/asan/CMakeFiles/RTAsan_static.x86_64.dir/asan_rtl_x86_64.S.o -MF compiler-rt/lib/asan/CMakeFiles/RTAsan_static.x86_64.dir/asan_rtl_x86_64.S.o.d -o compiler-rt/lib/asan/CMakeFiles/RTAsan_static.x86_64.dir/asan_rtl_x86_64.S.o -c /share/dim/src/llvm/llvm-project/compiler-rt/lib/asan/asan_rtl_x86_64.S
/share/dim/src/llvm/llvm-project/compiler-rt/lib/asan/asan_rtl_x86_64.S:129:4358: error: displacement 70368744177664 is not within [-2147483648, 2147483647]
.section .text.__asan_check_load_add_1_RAX,"ax", at progbits ;.globl __asan_check_load_add_1_RAX ;.hidden __asan_check_load_add_1_RAX ;.type __asan_check_load_add_1_RAX, @function ;.cfi_startproc ;__asan_check_load_add_1_RAX: ; ; mov %RAX,%r10 ; shr $0x3,%r10 ; .if 0x0000400000000000 < 0x80000000 ; movsbl 0x0000400000000000(%r10),%r10d ; .else ; movabsq $0x0000400000000000,%r11 ; movsbl (%r10,%r11),%r10d ; .endif ; test %r10d,%r10d ; jne .check_load_add_1_RAX ;.return_load_add_1_RAX: ; retq ; ; .check_load_add_1_RAX: ; mov %RAX,%r11 ; and $0x7,%r11d ; cmp %r10d,%r11d ; jl .return_load_add_1_RAX; mov %RAX,%rdi ; jmp __asan_report_load1_asm ; ;.cfi_endproc ; .section .text.__asan_check_store_add_1_RAX,"ax", at progbits ;.globl __asan_check_store_add_1_RAX ;.hidden __asan_check_store_add_1_RAX ;.type __asan_check_store_add_1_RAX, @function ;.cfi_startproc ;__asan_check_store_add_1_RAX: ; ; mov %RAX,%r10 ; shr $0x3,%r10 ; .if 0x0000400000000000 < 0x80000000 ; movsbl 0x0000400000000000(%r10),%r10d ; .else ; movabsq $0x0000400000000000,%r11 ; movsbl (%r10,%r11),%r10d ; .endif ; test %r10d,%r10d ; jne .check_store_add_1_RAX ;.return_store_add_1_RAX: ; retq ; ; .check_store_add_1_RAX: ; mov %RAX,%r11 ; and $0x7,%r11d ; cmp %r10d,%r11d ; jl .return_store_add_1_RAX; mov %RAX,%rdi ; jmp __asan_report_store1_asm ; ;.cfi_endproc ; .section .text.__asan_check_load_add_2_RAX,"ax", at progbits ;.globl __asan_check_load_add_2_RAX ;.hidden __asan_check_load_add_2_RAX ;.type __asan_check_load_add_2_RAX, @function ;.cfi_startproc ;__asan_check_load_add_2_RAX: ; ; mov %RAX,%r10 ; shr $0x3,%r10 ; .if 0x0000400000000000 < 0x80000000 ; movsbl 0x0000400000000000(%r10),%r10d ; .else ; movabsq $0x0000400000000000,%r11 ; movsbl (%r10,%r11),%r10d ; .endif ; test %r10d,%r10d ; jne .check_load_add_2_RAX ;.return_load_add_2_RAX: ; retq ; ; .check_load_add_2_RAX: ; mov %RAX,%r11 ; and $0x7,%r11d ; add $0x1,%r11d ; cmp %r10d,%r11d ; jl .return_load_add_2_RAX; mov %RAX,%rdi ; jmp __asan_report_load2_asm ; ;.cfi_endproc ; .section .text.__asan_check_store_add_2_RAX,"ax", at progbits ;.globl __asan_check_store_add_2_RAX ;.hidden __asan_check_store_add_2_RAX ;.type __asan_check_store_add_2_RAX, @function ;.cfi_startproc ;__asan_check_store_add_2_RAX: ; ; mov %RAX,%r10 ; shr $0x3,%r10 ; .if 0x0000400000000000 < 0x80000000 ; movsbl 0x0000400000000000(%r10),%r10d ; .else ; movabsq $0x0000400000000000,%r11 ; movsbl (%r10,%r11),%r10d ; .endif ; test %r10d,%r10d ; jne .check_store_add_2_RAX ;.return_store_add_2_RAX: ; retq ; ; .check_store_add_2_RAX: ; mov %RAX,%r11 ; and $0x7,%r11d ; add $0x1,%r11d ; cmp %r10d,%r11d ; jl .return_store_add_2_RAX; mov %RAX,%rdi ; jmp __asan_report_store2_asm ; ;.cfi_endproc ; .section .text.__asan_check_load_add_4_RAX,"ax", at progbits ;.globl __asan_check_load_add_4_RAX ;.hidden __asan_check_load_add_4_RAX ;.type __asan_check_load_add_4_RAX, @function ;.cfi_startproc ;__asan_check_load_add_4_RAX: ; ; mov %RAX,%r10 ; shr $0x3,%r10 ; .if 0x0000400000000000 < 0x80000000 ; movsbl 0x0000400000000000(%r10),%r10d ; .else ; movabsq $0x0000400000000000,%r11 ; movsbl (%r10,%r11),%r10d ; .endif ; test %r10d,%r10d ; jne .check_load_add_4_RAX ;.return_load_add_4_RAX: ; retq ; ; .check_load_add_4_RAX: ; mov %RAX,%r11 ; and $0x7,%r11d ; add $0x3,%r11d ; cmp %r10d,%r11d ; jl .return_load_add_4_RAX; mov %RAX,%rdi ; jmp __asan_report_load4_asm ; ;.cfi_endproc ; .section .text.__asan_check_store_add_4_RAX,"ax", at progbits ;.globl __asan_check_store_add_4_RAX ;.hidden __asan_check_store_add_4_RAX ;.type __asan_check_store_add_4_RAX, @function ;.cfi_startproc ;__asan_check_store_add_4_RAX: ; ; mov %RAX,%r10 ; shr $0x3,%r10 ; .if 0x0000400000000000 < 0x80000000 ; movsbl 0x0000400000000000(%r10),%r10d ; .else ; movabsq $0x0000400000000000,%r11 ; movsbl (%r10,%r11),%r10d ; .endif ; test %r10d,%r10d ; jne .check_store_add_4_RAX ;.return_store_add_4_RAX: ; retq ; ; .check_store_add_4_RAX: ; mov %RAX,%r11 ; and $0x7,%r11d ; add $0x3,%r11d ; cmp %r10d,%r11d ; jl .return_store_add_4_RAX; mov %RAX,%rdi ; jmp __asan_report_store4_asm ; ;.cfi_endproc ; .section .text.__asan_check_load_add_8_RAX,"ax", at progbits ;.globl __asan_check_load_add_8_RAX ;.hidden __asan_check_load_add_8_RAX ;.type __asan_check_load_add_8_RAX, @function ;.cfi_startproc ;__asan_check_load_add_8_RAX: ; ; mov %RAX,%r10 ; shr $0x3,%r10 ;cmpb $0x0,0x0000400000000000(%r10) ; jne .fail_load_add_8_RAX ; retq ; ; .fail_load_add_8_RAX: ; mov %RAX,%rdi ; jmp __asan_report_load8_asm; ;.cfi_endproc ; .section .text.__asan_check_store_add_8_RAX,"ax", at progbits ;.globl __asan_check_store_add_8_RAX ;.hidden __asan_check_store_add_8_RAX ;.type __asan_check_store_add_8_RAX, @function ;.cfi_startproc ;__asan_check_store_add_8_RAX: ; ; mov %RAX,%r10 ; shr $0x3,%r10 ;cmpb $0x0,0x0000400000000000(%r10) ; jne .fail_store_add_8_RAX ; retq ; ; .fail_store_add_8_RAX: ; mov %RAX,%rdi ; jmp __asan_report_store8_asm; ;.cfi_endproc ; .section .text.__asan_check_load_add_16_RAX,"ax", at progbits ;.globl __asan_check_load_add_16_RAX ;.hidden __asan_check_load_add_16_RAX ;.type __asan_check_load_add_16_RAX, @function ;.cfi_startproc ;__asan_check_load_add_16_RAX: ; ; mov %RAX,%r10 ; shr $0x3,%r10 ;cmpw $0x0,0x0000400000000000(%r10) ; jne .fail_load_add_16_RAX ; retq ; ; .fail_load_add_16_RAX: ; mov %RAX,%rdi ; jmp __asan_report_load16_asm; ;.cfi_endproc ; .section .text.__asan_check_store_add_16_RAX,"ax", at progbits ;.globl __asan_check_store_add_16_RAX ;.hidden __asan_check_store_add_16_RAX ;.type __asan_check_store_add_16_RAX, @function ;.cfi_startproc ;__asan_check_store_add_16_RAX: ; ; mov %RAX,%r10 ; shr $0x3,%r10 ;cmpw $0x0,0x0000400000000000(%r10) ; jne .fail_store_add_16_RAX ; retq ; ; .fail_store_add_16_RAX: ; mov %RAX,%rdi ; jmp __asan_report_store16_asm; ;.cfi_endproc ;
```

So unless I'm understanding it incorrectly, this commit achieved the inverse of what it was supposed to do? Note the assembler complaining here is clang's own internal one... :)

I'll double check that it is exactly this commit, though.

https://github.com/llvm/llvm-project/pull/75748


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