[llvm] [RISCV] Make Zcmt imply Zicsr. (PR #75464)

[via llvm-commits]

https://github.com/yroux created https://github.com/llvm/llvm-project/pull/75464

This patch fixes build attributes w/r to Zcmt extension dependency on Zicsr.

>From 5e853e619e1b9f302277371d0ab1b1eb31adb182 Mon Sep 17 00:00:00 2001
From: Yvan Roux <yvan.roux at foss.st.com>
Date: Thu, 14 Dec 2023 11:46:05 +0100
Subject: [PATCH] [RISCV] Make Zcmt imply Zicsr.

This patch fixes build attributes w/r to Zcmt extension dependency on
Zicsr.
---
 llvm/lib/Support/RISCVISAInfo.cpp           | 2 +-
 llvm/test/MC/RISCV/attribute-arch.s         | 2 +-
 llvm/unittests/Support/RISCVISAInfoTest.cpp | 6 ++++--
 3 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Support/RISCVISAInfo.cpp b/llvm/lib/Support/RISCVISAInfo.cpp
index 85c34dd6206307..5b06d790f83644 100644
--- a/llvm/lib/Support/RISCVISAInfo.cpp
+++ b/llvm/lib/Support/RISCVISAInfo.cpp
@@ -1006,7 +1006,7 @@ static const char *ImpliedExtsZcd[] = {"d", "zca"};
 static const char *ImpliedExtsZce[] = {"zcb", "zcmp", "zcmt"};
 static const char *ImpliedExtsZcf[] = {"f", "zca"};
 static const char *ImpliedExtsZcmp[] = {"zca"};
-static const char *ImpliedExtsZcmt[] = {"zca"};
+static const char *ImpliedExtsZcmt[] = {"zca", "zicsr"};
 static const char *ImpliedExtsZdinx[] = {"zfinx"};
 static const char *ImpliedExtsZfa[] = {"f"};
 static const char *ImpliedExtsZfbfmin[] = {"f"};
diff --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s
index 3ed48401e43fc8..66311c8c1e6df4 100644
--- a/llvm/test/MC/RISCV/attribute-arch.s
+++ b/llvm/test/MC/RISCV/attribute-arch.s
@@ -244,7 +244,7 @@
 # CHECK: attribute      5, "rv32i2p1_zca1p0_zcmp1p0"
 
 .attribute arch, "rv32izcmt1p0"
-# CHECK: attribute      5, "rv32i2p1_zca1p0_zcmt1p0"
+# CHECK: attribute      5, "rv32i2p1_zicsr2p0_zca1p0_zcmt1p0"
 
 .attribute arch, "rv64i_xsfvcp"
 # CHECK: attribute      5, "rv64i2p1_zicsr2p0_zve32x1p0_zvl32b1p0_xsfvcp1p0"
diff --git a/llvm/unittests/Support/RISCVISAInfoTest.cpp b/llvm/unittests/Support/RISCVISAInfoTest.cpp
index 3de14907899eb6..ef83c3f7ef6b24 100644
--- a/llvm/unittests/Support/RISCVISAInfoTest.cpp
+++ b/llvm/unittests/Support/RISCVISAInfoTest.cpp
@@ -519,8 +519,9 @@ TEST(ParseArchString, ZceImplication) {
   ASSERT_THAT_EXPECTED(MaybeRV32IZce, Succeeded());
   RISCVISAInfo::OrderedExtensionMap ExtsRV32IZce =
       (*MaybeRV32IZce)->getExtensions();
-  EXPECT_EQ(ExtsRV32IZce.size(), 6UL);
+  EXPECT_EQ(ExtsRV32IZce.size(), 7UL);
   EXPECT_EQ(ExtsRV32IZce.count("i"), 1U);
+  EXPECT_EQ(ExtsRV32IZce.count("zicsr"), 1U);
   EXPECT_EQ(ExtsRV32IZce.count("zca"), 1U);
   EXPECT_EQ(ExtsRV32IZce.count("zcb"), 1U);
   EXPECT_EQ(ExtsRV32IZce.count("zce"), 1U);
@@ -562,8 +563,9 @@ TEST(ParseArchString, ZceImplication) {
   ASSERT_THAT_EXPECTED(MaybeRV64IZce, Succeeded());
   RISCVISAInfo::OrderedExtensionMap ExtsRV64IZce =
       (*MaybeRV64IZce)->getExtensions();
-  EXPECT_EQ(ExtsRV64IZce.size(), 6UL);
+  EXPECT_EQ(ExtsRV64IZce.size(), 7UL);
   EXPECT_EQ(ExtsRV64IZce.count("i"), 1U);
+  EXPECT_EQ(ExtsRV64IZce.count("zicsr"), 1U);
   EXPECT_EQ(ExtsRV64IZce.count("zca"), 1U);
   EXPECT_EQ(ExtsRV64IZce.count("zcb"), 1U);
   EXPECT_EQ(ExtsRV64IZce.count("zce"), 1U);