[llvm] Fix https://github.com/llvm/llvm-project/pull/72633 (PR #75351)

via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 13 07:55:52 PST 2023


https://github.com/mohammed-nurulhoque created https://github.com/llvm/llvm-project/pull/75351

The PR above got merged then reverted because of a test failure. It wasn't rebased before merging and in the meantime https://github.com/llvm/llvm-project/commit/3114bd32e75 made remapInstructions not run when SlotRemap is empty. This fixes the issue.

>From 4c0bca55285e75a4eea5e5ebb3077a772ef00472 Mon Sep 17 00:00:00 2001
From: "Mohammed.NurulHoque" <Mohammed.NurulHoque at imgtec.com>
Date: Thu, 19 May 2022 10:53:44 +0100
Subject: [PATCH 1/6] delete dead stack slots (#104)

deletes slots that have lifetime markers and the lifetime ranges are empty.
---
 llvm/lib/CodeGen/StackColoring.cpp            |  9 +++++-
 .../CodeGen/PowerPC/aix32-cc-abi-vaarg.ll     |  1 -
 .../CodeGen/PowerPC/aix64-cc-abi-vaarg.ll     |  8 ++---
 llvm/test/CodeGen/RISCV/dead-stack-slot.ll    | 32 +++++++++++++++++++
 4 files changed, 42 insertions(+), 8 deletions(-)
 create mode 100644 llvm/test/CodeGen/RISCV/dead-stack-slot.ll

diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp
index 37f7aa9290054e..9378276eb785d9 100644
--- a/llvm/lib/CodeGen/StackColoring.cpp
+++ b/llvm/lib/CodeGen/StackColoring.cpp
@@ -1250,8 +1250,15 @@ bool StackColoring::runOnMachineFunction(MachineFunction &Func) {
 
   // Do not bother looking at empty intervals.
   for (unsigned I = 0; I < NumSlots; ++I) {
-    if (Intervals[SortedSlots[I]]->empty())
+    int Slot = SortedSlots[I];
+    if (Intervals[Slot]->empty()) {
+      if (InterestingSlots.test(Slot) && !ConservativeSlots.test(Slot)) {
+        RemovedSlots += 1;
+        ReducedSize += MFI->getObjectSize(Slot);
+        MFI->RemoveStackObject(Slot);
+      }
       SortedSlots[I] = -1;
+    }
   }
 
   // This is a simple greedy algorithm for merging allocas. First, sort the
diff --git a/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll b/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
index bf66a1ed042d22..1b0a803734ae9f 100644
--- a/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
@@ -347,7 +347,6 @@ entry:
 
 ; 32BIT-LABEL:   stack:
 ; 32BIT-DAG:     - { id: 0, name: arg1, type: default, offset: 0, size: 4, alignment: 4,
-; 32BIT-DAG:     - { id: 1, name: arg2, type: default, offset: 0, size: 4, alignment: 4,
 ; 32BIT-DAG:     - { id: 2, name: '', type: default, offset: 0, size: 8, alignment: 8,
 ; 32BIT-DAG:     - { id: 3, name: '', type: default, offset: 0, size: 8, alignment: 8,
 
diff --git a/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll b/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
index ccf89aac2d5408..a8684fdfe1c568 100644
--- a/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
@@ -138,9 +138,7 @@
 ; 64BIT-LABEL:   fixedStack:
 ; 64BIT-DAG:     - { id: 0, type: default, offset: 112, size: 8, alignment: 16, stack-id: default,
 
-; 64BIT-LABEL:   stack:
-; 64BIT-DAG:     - { id: 0, name: arg1, type: default, offset: 0, size: 8, alignment: 8,
-; 64BIT-DAG:     - { id: 1, name: arg2, type: default, offset: 0, size: 8, alignment: 8,
+; 64BIT-LABEL:   stack: []
 
 ; 64BIT-LABEL:   body:             |
 ; 64BIT-DAG:     liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
@@ -305,9 +303,7 @@
 ; 64BIT-LABEL:   fixedStack:
 ; 64BIT-DAG:       - { id: 0, type: default, offset: 152, size: 8
 
-; 64BIT-LABEL:   stack:
-; 64BIT-DAG:       - { id: 0, name: arg1, type: default, offset: 0, size: 8
-; 64BIT-DAG:       - { id: 1, name: arg2, type: default, offset: 0, size: 8
+; 64BIT-LABEL:   stack:           []
 
 ; 64BIT-LABEL:     body:             |
 ; 64BIT-DAG:       liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
diff --git a/llvm/test/CodeGen/RISCV/dead-stack-slot.ll b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
new file mode 100644
index 00000000000000..fdba359edddaf8
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
+; RUN:   | FileCheck %s -check-prefix=RV32I
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
+; RUN:   | FileCheck %s -check-prefix=RV64I
+
+; Remove the lifetime-marked alloca, but not the unmarked one.
+define dso_local signext i32 @f1() nounwind {
+; RV32I-LABEL: f1:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    addi sp, sp, -32
+; RV32I-NEXT:    li a0, 0
+; RV32I-NEXT:    addi sp, sp, 32
+; RV32I-NEXT:    ret
+;
+; RV64I-LABEL: f1:
+; RV64I:       # %bb.0:
+; RV64I-NEXT:    addi sp, sp, -32
+; RV64I-NEXT:    li a0, 0
+; RV64I-NEXT:    addi sp, sp, 32
+; RV64I-NEXT:    ret
+  %1 = alloca [32 x i8], align 4
+  %2 = alloca [32 x i8], align 4
+  %3 = getelementptr inbounds [32 x i8], [32 x i8]* %1, i64 0, i64 0
+  call void @llvm.lifetime.start.p0i8(i64 32, i8* nonnull %3)
+  call void @llvm.lifetime.end.p0i8(i64 32, i8* nonnull %3)
+  ret i32 0
+}
+
+declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+

>From 494eb39abca0b9b83eb449f44cf45a55d349aea6 Mon Sep 17 00:00:00 2001
From: Mohammed Nurul Hoque <Mohammed.NurulHoque at imgtec.com>
Date: Mon, 27 Nov 2023 11:49:27 +0000
Subject: [PATCH 2/6] Fix Debug Info after removing stack slot

---
 llvm/lib/CodeGen/StackColoring.cpp       |  7 +++++++
 llvm/test/DebugInfo/COFF/lexicalblock.ll | 24 ++----------------------
 2 files changed, 9 insertions(+), 22 deletions(-)

diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp
index 9378276eb785d9..b7b89f93f53d78 100644
--- a/llvm/lib/CodeGen/StackColoring.cpp
+++ b/llvm/lib/CodeGen/StackColoring.cpp
@@ -900,6 +900,13 @@ void StackColoring::remapInstructions(DenseMap<int, int> &SlotRemap) {
   unsigned FixedMemOp = 0;
   unsigned FixedDbg = 0;
 
+  // Remove debug information for deleted slots.
+  erase_if(MF->getVariableDbgInfo(), [&](auto &VI) {
+    int Slot = VI.getStackSlot();
+    return Slot >= 0 && Intervals[Slot]->empty() &&
+           InterestingSlots.test(Slot) && !ConservativeSlots.test(Slot);
+  });
+
   // Remap debug information that refers to stack slots.
   for (auto &VI : MF->getVariableDbgInfo()) {
     if (!VI.Var || !VI.inStackSlot())
diff --git a/llvm/test/DebugInfo/COFF/lexicalblock.ll b/llvm/test/DebugInfo/COFF/lexicalblock.ll
index 40dd8f894252c2..3bfae85f6c9bad 100644
--- a/llvm/test/DebugInfo/COFF/lexicalblock.ll
+++ b/llvm/test/DebugInfo/COFF/lexicalblock.ll
@@ -63,32 +63,12 @@
 ; CHECK: LocalSym {
 ; CHECK:   VarName: localA
 ; CHECK: }
-; CHECK: LocalSym {
-; CHECK:   VarName: localB
-; CHECK: }
-; CHECK: BlockSym {
-; CHECK:   Kind: S_BLOCK32 {{.*}}
-; CHECK:   BlockName: 
-; CHECK: }
-; CHECK: ScopeEndSym {
-; CHECK:   Kind: S_END {{.*}}
-; CHECK: }
-; CHECK: BlockSym {
-; CHECK:   Kind: S_BLOCK32 {{.*}}
-; CHECK:   BlockName: 
-; CHECK: }
-; CHECK: ScopeEndSym {
-; CHECK:   Kind: S_END {{.*}}
-; CHECK: }
 ; CHECK: BlockSym {
 ; CHECK:   Kind: S_BLOCK32 {{.*}}
 ; CHECK:   BlockName: 
 ; CHECK: }
-; CHECK: ScopeEndSym {
-; CHECK: }
-; CHECK: BlockSym {
-; CHECK:   Kind: S_BLOCK32 {{.*}}
-; CHECK:   BlockName: 
+; CHECK: LocalSym {
+; CHECK:   VarName: localB
 ; CHECK: }
 ; CHECK: ScopeEndSym {
 ; CHECK:   Kind: S_END {{.*}}

>From 03d1072dc5deb541c136b014c9ffb2f1d76fb977 Mon Sep 17 00:00:00 2001
From: Mohammed Nurul Hoque <Mohammed.NurulHoque at imgtec.com>
Date: Tue, 28 Nov 2023 10:24:23 +0000
Subject: [PATCH 3/6] use-opaque-pointer

---
 llvm/test/CodeGen/RISCV/dead-stack-slot.ll | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/llvm/test/CodeGen/RISCV/dead-stack-slot.ll b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
index fdba359edddaf8..3bfe05eabb36b3 100644
--- a/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
+++ b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
@@ -21,12 +21,12 @@ define dso_local signext i32 @f1() nounwind {
 ; RV64I-NEXT:    ret
   %1 = alloca [32 x i8], align 4
   %2 = alloca [32 x i8], align 4
-  %3 = getelementptr inbounds [32 x i8], [32 x i8]* %1, i64 0, i64 0
-  call void @llvm.lifetime.start.p0i8(i64 32, i8* nonnull %3)
-  call void @llvm.lifetime.end.p0i8(i64 32, i8* nonnull %3)
+  %3 = getelementptr inbounds [32 x i8], ptr %1, i64 0, i64 0
+  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %3)
+  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3)
   ret i32 0
 }
 
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
 

>From d167617655bb7255dc7e83a34c2b00c5bd531106 Mon Sep 17 00:00:00 2001
From: Mohammed Nurul Hoque <Mohammed.NurulHoque at imgtec.com>
Date: Wed, 29 Nov 2023 22:01:41 +0000
Subject: [PATCH 4/6] check debuginfo is stack slot

---
 llvm/lib/CodeGen/StackColoring.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp
index b7b89f93f53d78..05bd2206da82c3 100644
--- a/llvm/lib/CodeGen/StackColoring.cpp
+++ b/llvm/lib/CodeGen/StackColoring.cpp
@@ -902,6 +902,7 @@ void StackColoring::remapInstructions(DenseMap<int, int> &SlotRemap) {
 
   // Remove debug information for deleted slots.
   erase_if(MF->getVariableDbgInfo(), [&](auto &VI) {
+    if (!VI.inStackSlot()) return false;
     int Slot = VI.getStackSlot();
     return Slot >= 0 && Intervals[Slot]->empty() &&
            InterestingSlots.test(Slot) && !ConservativeSlots.test(Slot);

>From d030d4a62a81cdcfe7639eef1a54e9feec1dd6f3 Mon Sep 17 00:00:00 2001
From: Mohammed Nurul Hoque <Mohammed.NurulHoque at imgtec.com>
Date: Thu, 7 Dec 2023 09:32:09 +0000
Subject: [PATCH 5/6] simplify test case

---
 llvm/test/CodeGen/RISCV/dead-stack-slot.ll | 25 ++++++++--------------
 1 file changed, 9 insertions(+), 16 deletions(-)

diff --git a/llvm/test/CodeGen/RISCV/dead-stack-slot.ll b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
index 3bfe05eabb36b3..49b0d2ab58c4f6 100644
--- a/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
+++ b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
@@ -1,24 +1,17 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
-; RUN:   | FileCheck %s -check-prefix=RV32I
+; RUN:   | FileCheck %s
 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
-; RUN:   | FileCheck %s -check-prefix=RV64I
+; RUN:   | FileCheck %s
 
 ; Remove the lifetime-marked alloca, but not the unmarked one.
-define dso_local signext i32 @f1() nounwind {
-; RV32I-LABEL: f1:
-; RV32I:       # %bb.0:
-; RV32I-NEXT:    addi sp, sp, -32
-; RV32I-NEXT:    li a0, 0
-; RV32I-NEXT:    addi sp, sp, 32
-; RV32I-NEXT:    ret
-;
-; RV64I-LABEL: f1:
-; RV64I:       # %bb.0:
-; RV64I-NEXT:    addi sp, sp, -32
-; RV64I-NEXT:    li a0, 0
-; RV64I-NEXT:    addi sp, sp, 32
-; RV64I-NEXT:    ret
+define signext i32 @f1() nounwind {
+; CHECK-LABEL: f1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    addi sp, sp, -32
+; CHECK-NEXT:    li a0, 0
+; CHECK-NEXT:    addi sp, sp, 32
+; CHECK-NEXT:    ret
   %1 = alloca [32 x i8], align 4
   %2 = alloca [32 x i8], align 4
   %3 = getelementptr inbounds [32 x i8], ptr %1, i64 0, i64 0

>From cd73bb962c2c2ac395d1032642adc559f0584c8b Mon Sep 17 00:00:00 2001
From: Mohammed Nurul Hoque <Mohammed.NurulHoque at imgtec.com>
Date: Thu, 7 Dec 2023 09:39:07 +0000
Subject: [PATCH 6/6] fix formatting

---
 llvm/lib/CodeGen/StackColoring.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp
index 05bd2206da82c3..0f298f5c9c09fd 100644
--- a/llvm/lib/CodeGen/StackColoring.cpp
+++ b/llvm/lib/CodeGen/StackColoring.cpp
@@ -902,7 +902,8 @@ void StackColoring::remapInstructions(DenseMap<int, int> &SlotRemap) {
 
   // Remove debug information for deleted slots.
   erase_if(MF->getVariableDbgInfo(), [&](auto &VI) {
-    if (!VI.inStackSlot()) return false;
+    if (!VI.inStackSlot())
+      return false;
     int Slot = VI.getStackSlot();
     return Slot >= 0 && Intervals[Slot]->empty() &&
            InterestingSlots.test(Slot) && !ConservativeSlots.test(Slot);



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