[llvm] [llvm] Use StringRef::{starts,ends}_with (NFC) (PR #74956)
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Sat Dec 9 16:37:06 PST 2023
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git-clang-format --diff bf9125294da1f3cf03a88356e068725c6f88bea6 63fc6677f49eebea178ff4bcd20b2fc68db39cc0 -- llvm/include/llvm/Analysis/ObjCARCAnalysisUtils.h llvm/include/llvm/CodeGen/IndirectThunks.h llvm/include/llvm/CodeGen/MIRYamlMapping.h llvm/include/llvm/MC/MCSectionCOFF.h llvm/include/llvm/Object/ELFObjectFile.h llvm/include/llvm/Passes/PassBuilder.h llvm/include/llvm/ProfileData/SampleProf.h llvm/include/llvm/Transforms/IPO/Attributor.h llvm/lib/Analysis/LoopInfo.cpp llvm/lib/Analysis/VFABIDemangling.cpp llvm/lib/AsmParser/LLLexer.cpp llvm/lib/BinaryFormat/Magic.cpp llvm/lib/Bitcode/Reader/MetadataLoader.cpp llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp llvm/lib/CodeGen/GlobalMerge.cpp llvm/lib/CodeGen/MIRParser/MILexer.cpp llvm/lib/CodeGen/SanitizerBinaryMetadata.cpp llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp llvm/lib/CodeGen/WinEHPrepare.cpp llvm/lib/DWARFLinker/DWARFLinker.cpp llvm/lib/DWARFLinkerParallel/DWARFLinkerCompileUnit.cpp llvm/lib/DWARFLinkerParallel/SyntheticTypeNameBuilder.cpp llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp llvm/lib/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.cpp llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp llvm/lib/ExecutionEngine/Orc/LLJIT.cpp llvm/lib/ExecutionEngine/Orc/ObjectFileInterface.cpp llvm/lib/ExecutionEngine/Orc/Shared/ObjectFormats.cpp llvm/lib/ExecutionEngine/RuntimeDyld/JITSymbol.cpp llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFAArch64.h llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFI386.h llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFThumb.h llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFX86_64.h llvm/lib/FileCheck/FileCheck.cpp llvm/lib/FuzzMutate/FuzzerCLI.cpp llvm/lib/IR/AutoUpgrade.cpp llvm/lib/IR/DebugInfo.cpp llvm/lib/IR/Function.cpp llvm/lib/IR/Mangler.cpp llvm/lib/IR/PassInstrumentation.cpp llvm/lib/IR/Type.cpp llvm/lib/IR/Verifier.cpp llvm/lib/InterfaceStub/IFSHandler.cpp llvm/lib/LTO/LTOModule.cpp llvm/lib/Linker/IRMover.cpp llvm/lib/MC/ELFObjectWriter.cpp llvm/lib/MC/MCAsmStreamer.cpp llvm/lib/MC/MCContext.cpp llvm/lib/MC/MCDwarf.cpp llvm/lib/MC/MCParser/AsmLexer.cpp llvm/lib/MC/MCParser/AsmParser.cpp llvm/lib/MC/MCParser/COFFMasmParser.cpp llvm/lib/MC/MCParser/ELFAsmParser.cpp llvm/lib/MC/MCParser/MasmParser.cpp llvm/lib/MC/StringTableBuilder.cpp llvm/lib/MC/WasmObjectWriter.cpp llvm/lib/MC/WinCOFFObjectWriter.cpp llvm/lib/ObjCopy/COFF/COFFObjcopy.cpp llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp llvm/lib/ObjCopy/MachO/MachOObject.h llvm/lib/ObjCopy/wasm/WasmObjcopy.cpp llvm/lib/Object/Archive.cpp llvm/lib/Object/COFFImportFile.cpp llvm/lib/Object/COFFModuleDefinition.cpp llvm/lib/Object/COFFObjectFile.cpp llvm/lib/Object/MachOObjectFile.cpp llvm/lib/Object/ModuleSymbolTable.cpp llvm/lib/Object/RecordStreamer.cpp llvm/lib/Object/WasmObjectFile.cpp llvm/lib/ObjectYAML/ELFEmitter.cpp llvm/lib/ObjectYAML/ELFYAML.cpp llvm/lib/Option/ArgList.cpp llvm/lib/Option/OptTable.cpp llvm/lib/Passes/PassBuilder.cpp llvm/lib/ProfileData/GCOV.cpp llvm/lib/ProfileData/InstrProf.cpp llvm/lib/ProfileData/InstrProfCorrelator.cpp llvm/lib/ProfileData/InstrProfReader.cpp llvm/lib/ProfileData/ItaniumManglingCanonicalizer.cpp llvm/lib/ProfileData/SampleProfReader.cpp llvm/lib/ProfileData/SymbolRemappingReader.cpp llvm/lib/Remarks/YAMLRemarkParser.cpp llvm/lib/Support/Unix/Path.inc llvm/lib/Target/AArch64/AArch64GlobalsTagging.cpp llvm/lib/Target/AArch64/AArch64SLSHardening.cpp llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp llvm/lib/Target/AMDGPU/R600OpenCLImageTypeLoweringPass.cpp llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp llvm/lib/Target/ARM/ARMSLSHardening.cpp llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp llvm/lib/Target/AVR/AVRAsmPrinter.cpp llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp llvm/lib/Target/BPF/BPFPreserveDIType.cpp llvm/lib/Target/BPF/BTFDebug.cpp llvm/lib/Target/Hexagon/HexagonSubtarget.cpp llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp llvm/lib/Target/Mips/MipsISelLowering.cpp llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp llvm/lib/Target/PowerPC/PPCTargetMachine.cpp llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp llvm/lib/Target/X86/X86InsertPrefetch.cpp llvm/lib/Target/X86/X86Subtarget.cpp llvm/lib/Target/XCore/XCoreISelLowering.cpp llvm/lib/Target/XCore/XCoreTargetObjectFile.cpp llvm/lib/TargetParser/AArch64TargetParser.cpp llvm/lib/TargetParser/ARMTargetParser.cpp llvm/lib/TargetParser/ARMTargetParserCommon.cpp llvm/lib/TargetParser/CSKYTargetParser.cpp llvm/lib/TargetParser/Host.cpp llvm/lib/TargetParser/Triple.cpp llvm/lib/TextAPI/Symbol.cpp llvm/lib/TextAPI/Target.cpp llvm/lib/TextAPI/TextStub.cpp llvm/tools/dsymutil/BinaryHolder.cpp llvm/tools/dsymutil/DwarfLinkerForBinary.cpp llvm/tools/dsymutil/MachODebugMapParser.cpp llvm/tools/dsymutil/MachOUtils.cpp llvm/tools/dsymutil/SymbolMap.cpp llvm/tools/llc/llc.cpp llvm/tools/lli/lli.cpp llvm/tools/llvm-ar/llvm-ar.cpp llvm/tools/llvm-as/llvm-as.cpp llvm/tools/llvm-config/llvm-config.cpp llvm/tools/llvm-cxxdump/llvm-cxxdump.cpp llvm/tools/llvm-diff/llvm-diff.cpp llvm/tools/llvm-dis/llvm-dis.cpp llvm/tools/llvm-dwarfutil/DebugInfoLinker.h llvm/tools/llvm-exegesis/lib/X86/Target.cpp llvm/tools/llvm-jitlink/llvm-jitlink.cpp llvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp llvm/tools/llvm-nm/llvm-nm.cpp llvm/tools/llvm-objcopy/ObjcopyOptions.cpp llvm/tools/llvm-objdump/COFFDump.cpp llvm/tools/llvm-objdump/MachODump.cpp llvm/tools/llvm-objdump/SourcePrinter.cpp llvm/tools/llvm-objdump/llvm-objdump.cpp llvm/tools/llvm-profdata/llvm-profdata.cpp llvm/tools/llvm-profgen/PerfReader.cpp llvm/tools/llvm-rc/ResourceScriptCppFilter.cpp llvm/tools/llvm-rc/ResourceScriptToken.cpp llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp llvm/tools/llvm-readobj/COFFDumper.cpp llvm/tools/llvm-readobj/ELFDumper.cpp llvm/tools/llvm-readobj/Win64EHDumper.cpp llvm/tools/llvm-reduce/deltas/StripDebugInfo.cpp llvm/tools/llvm-reduce/llvm-reduce.cpp llvm/tools/llvm-stress/llvm-stress.cpp llvm/tools/llvm-undname/llvm-undname.cpp llvm/tools/obj2yaml/archive2yaml.cpp llvm/tools/obj2yaml/elf2yaml.cpp llvm/tools/obj2yaml/macho2yaml.cpp llvm/tools/obj2yaml/wasm2yaml.cpp llvm/tools/opt/opt.cpp llvm/tools/yaml2obj/yaml2obj.cpp llvm/utils/split-file/split-file.cpp llvm/utils/yaml-bench/YAMLBench.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/CodeGen/GlobalMerge.cpp b/llvm/lib/CodeGen/GlobalMerge.cpp
index ab4b26e294..22b6d31d06 100644
--- a/llvm/lib/CodeGen/GlobalMerge.cpp
+++ b/llvm/lib/CodeGen/GlobalMerge.cpp
@@ -643,8 +643,7 @@ bool GlobalMerge::doInitialization(Module &M) {
StringRef Section = GV.getSection();
// Ignore all 'special' globals.
- if (GV.getName().starts_with("llvm.") ||
- GV.getName().starts_with(".llvm."))
+ if (GV.getName().starts_with("llvm.") || GV.getName().starts_with(".llvm."))
continue;
// Ignore all "required" globals:
diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index c71ba4d71e..27d47aab4b 100644
--- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -478,24 +478,19 @@ static SectionKind getELFKindForNamedSection(StringRef Name, SectionKind K) {
if (Name.empty() || Name[0] != '.') return K;
// Default implementation based on some magic section names.
- if (Name == ".bss" ||
- Name.starts_with(".bss.") ||
+ if (Name == ".bss" || Name.starts_with(".bss.") ||
Name.starts_with(".gnu.linkonce.b.") ||
- Name.starts_with(".llvm.linkonce.b.") ||
- Name == ".sbss" ||
- Name.starts_with(".sbss.") ||
- Name.starts_with(".gnu.linkonce.sb.") ||
+ Name.starts_with(".llvm.linkonce.b.") || Name == ".sbss" ||
+ Name.starts_with(".sbss.") || Name.starts_with(".gnu.linkonce.sb.") ||
Name.starts_with(".llvm.linkonce.sb."))
return SectionKind::getBSS();
- if (Name == ".tdata" ||
- Name.starts_with(".tdata.") ||
+ if (Name == ".tdata" || Name.starts_with(".tdata.") ||
Name.starts_with(".gnu.linkonce.td.") ||
Name.starts_with(".llvm.linkonce.td."))
return SectionKind::getThreadData();
- if (Name == ".tbss" ||
- Name.starts_with(".tbss.") ||
+ if (Name == ".tbss" || Name.starts_with(".tbss.") ||
Name.starts_with(".gnu.linkonce.tb.") ||
Name.starts_with(".llvm.linkonce.tb."))
return SectionKind::getThreadBSS();
diff --git a/llvm/lib/Option/ArgList.cpp b/llvm/lib/Option/ArgList.cpp
index 9fcc91a927..72003e3a52 100644
--- a/llvm/lib/Option/ArgList.cpp
+++ b/llvm/lib/Option/ArgList.cpp
@@ -185,8 +185,8 @@ const char *ArgList::GetOrMakeJoinedArgString(unsigned Index,
StringRef LHS,
StringRef RHS) const {
StringRef Cur = getArgString(Index);
- if (Cur.size() == LHS.size() + RHS.size() &&
- Cur.starts_with(LHS) && Cur.ends_with(RHS))
+ if (Cur.size() == LHS.size() + RHS.size() && Cur.starts_with(LHS) &&
+ Cur.ends_with(RHS))
return Cur.data();
return MakeArgString(LHS + RHS);
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 7405e370e0..18dccb26b8 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -6295,32 +6295,29 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic,
// Ignore some mnemonics we know aren't predicated forms.
//
// FIXME: Would be nice to autogen this.
- if ((Mnemonic == "movs" && isThumb()) ||
- Mnemonic == "teq" || Mnemonic == "vceq" || Mnemonic == "svc" ||
- Mnemonic == "mls" || Mnemonic == "smmls" || Mnemonic == "vcls" ||
- Mnemonic == "vmls" || Mnemonic == "vnmls" || Mnemonic == "vacge" ||
- Mnemonic == "vcge" || Mnemonic == "vclt" || Mnemonic == "vacgt" ||
- Mnemonic == "vaclt" || Mnemonic == "vacle" || Mnemonic == "hlt" ||
- Mnemonic == "vcgt" || Mnemonic == "vcle" || Mnemonic == "smlal" ||
- Mnemonic == "umaal" || Mnemonic == "umlal" || Mnemonic == "vabal" ||
- Mnemonic == "vmlal" || Mnemonic == "vpadal" || Mnemonic == "vqdmlal" ||
- Mnemonic == "fmuls" || Mnemonic == "vmaxnm" || Mnemonic == "vminnm" ||
- Mnemonic == "vcvta" || Mnemonic == "vcvtn" || Mnemonic == "vcvtp" ||
- Mnemonic == "vcvtm" || Mnemonic == "vrinta" || Mnemonic == "vrintn" ||
- Mnemonic == "vrintp" || Mnemonic == "vrintm" || Mnemonic == "hvc" ||
- Mnemonic.starts_with("vsel") || Mnemonic == "vins" || Mnemonic == "vmovx" ||
- Mnemonic == "bxns" || Mnemonic == "blxns" ||
- Mnemonic == "vdot" || Mnemonic == "vmmla" ||
- Mnemonic == "vudot" || Mnemonic == "vsdot" ||
- Mnemonic == "vcmla" || Mnemonic == "vcadd" ||
- Mnemonic == "vfmal" || Mnemonic == "vfmsl" ||
- Mnemonic == "wls" || Mnemonic == "le" || Mnemonic == "dls" ||
- Mnemonic == "csel" || Mnemonic == "csinc" ||
- Mnemonic == "csinv" || Mnemonic == "csneg" || Mnemonic == "cinc" ||
- Mnemonic == "cinv" || Mnemonic == "cneg" || Mnemonic == "cset" ||
- Mnemonic == "csetm" ||
- Mnemonic == "aut" || Mnemonic == "pac" || Mnemonic == "pacbti" ||
- Mnemonic == "bti")
+ if ((Mnemonic == "movs" && isThumb()) || Mnemonic == "teq" ||
+ Mnemonic == "vceq" || Mnemonic == "svc" || Mnemonic == "mls" ||
+ Mnemonic == "smmls" || Mnemonic == "vcls" || Mnemonic == "vmls" ||
+ Mnemonic == "vnmls" || Mnemonic == "vacge" || Mnemonic == "vcge" ||
+ Mnemonic == "vclt" || Mnemonic == "vacgt" || Mnemonic == "vaclt" ||
+ Mnemonic == "vacle" || Mnemonic == "hlt" || Mnemonic == "vcgt" ||
+ Mnemonic == "vcle" || Mnemonic == "smlal" || Mnemonic == "umaal" ||
+ Mnemonic == "umlal" || Mnemonic == "vabal" || Mnemonic == "vmlal" ||
+ Mnemonic == "vpadal" || Mnemonic == "vqdmlal" || Mnemonic == "fmuls" ||
+ Mnemonic == "vmaxnm" || Mnemonic == "vminnm" || Mnemonic == "vcvta" ||
+ Mnemonic == "vcvtn" || Mnemonic == "vcvtp" || Mnemonic == "vcvtm" ||
+ Mnemonic == "vrinta" || Mnemonic == "vrintn" || Mnemonic == "vrintp" ||
+ Mnemonic == "vrintm" || Mnemonic == "hvc" ||
+ Mnemonic.starts_with("vsel") || Mnemonic == "vins" ||
+ Mnemonic == "vmovx" || Mnemonic == "bxns" || Mnemonic == "blxns" ||
+ Mnemonic == "vdot" || Mnemonic == "vmmla" || Mnemonic == "vudot" ||
+ Mnemonic == "vsdot" || Mnemonic == "vcmla" || Mnemonic == "vcadd" ||
+ Mnemonic == "vfmal" || Mnemonic == "vfmsl" || Mnemonic == "wls" ||
+ Mnemonic == "le" || Mnemonic == "dls" || Mnemonic == "csel" ||
+ Mnemonic == "csinc" || Mnemonic == "csinv" || Mnemonic == "csneg" ||
+ Mnemonic == "cinc" || Mnemonic == "cinv" || Mnemonic == "cneg" ||
+ Mnemonic == "cset" || Mnemonic == "csetm" || Mnemonic == "aut" ||
+ Mnemonic == "pac" || Mnemonic == "pacbti" || Mnemonic == "bti")
return Mnemonic;
// First, split out any predication code. Ignore mnemonics we know aren't
@@ -6330,15 +6327,12 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic,
Mnemonic != "umlals" && Mnemonic != "umulls" && Mnemonic != "lsls" &&
Mnemonic != "sbcs" && Mnemonic != "rscs" &&
!(hasMVE() &&
- (Mnemonic == "vmine" ||
- Mnemonic == "vshle" || Mnemonic == "vshlt" || Mnemonic == "vshllt" ||
- Mnemonic == "vrshle" || Mnemonic == "vrshlt" ||
- Mnemonic == "vmvne" || Mnemonic == "vorne" ||
- Mnemonic == "vnege" || Mnemonic == "vnegt" ||
- Mnemonic == "vmule" || Mnemonic == "vmult" ||
- Mnemonic == "vrintne" ||
- Mnemonic == "vcmult" || Mnemonic == "vcmule" ||
- Mnemonic == "vpsele" || Mnemonic == "vpselt" ||
+ (Mnemonic == "vmine" || Mnemonic == "vshle" || Mnemonic == "vshlt" ||
+ Mnemonic == "vshllt" || Mnemonic == "vrshle" || Mnemonic == "vrshlt" ||
+ Mnemonic == "vmvne" || Mnemonic == "vorne" || Mnemonic == "vnege" ||
+ Mnemonic == "vnegt" || Mnemonic == "vmule" || Mnemonic == "vmult" ||
+ Mnemonic == "vrintne" || Mnemonic == "vcmult" ||
+ Mnemonic == "vcmule" || Mnemonic == "vpsele" || Mnemonic == "vpselt" ||
Mnemonic.starts_with("vq")))) {
unsigned CC = ARMCondCodeFromString(Mnemonic.substr(Mnemonic.size()-2));
if (CC != ~0U) {
@@ -6350,17 +6344,16 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic,
// Next, determine if we have a carry setting bit. We explicitly ignore all
// the instructions we know end in 's'.
if (Mnemonic.ends_with("s") &&
- !(Mnemonic == "cps" || Mnemonic == "mls" ||
- Mnemonic == "mrs" || Mnemonic == "smmls" || Mnemonic == "vabs" ||
- Mnemonic == "vcls" || Mnemonic == "vmls" || Mnemonic == "vmrs" ||
- Mnemonic == "vnmls" || Mnemonic == "vqabs" || Mnemonic == "vrecps" ||
- Mnemonic == "vrsqrts" || Mnemonic == "srs" || Mnemonic == "flds" ||
- Mnemonic == "fmrs" || Mnemonic == "fsqrts" || Mnemonic == "fsubs" ||
- Mnemonic == "fsts" || Mnemonic == "fcpys" || Mnemonic == "fdivs" ||
- Mnemonic == "fmuls" || Mnemonic == "fcmps" || Mnemonic == "fcmpzs" ||
- Mnemonic == "vfms" || Mnemonic == "vfnms" || Mnemonic == "fconsts" ||
- Mnemonic == "bxns" || Mnemonic == "blxns" || Mnemonic == "vfmas" ||
- Mnemonic == "vmlas" ||
+ !(Mnemonic == "cps" || Mnemonic == "mls" || Mnemonic == "mrs" ||
+ Mnemonic == "smmls" || Mnemonic == "vabs" || Mnemonic == "vcls" ||
+ Mnemonic == "vmls" || Mnemonic == "vmrs" || Mnemonic == "vnmls" ||
+ Mnemonic == "vqabs" || Mnemonic == "vrecps" || Mnemonic == "vrsqrts" ||
+ Mnemonic == "srs" || Mnemonic == "flds" || Mnemonic == "fmrs" ||
+ Mnemonic == "fsqrts" || Mnemonic == "fsubs" || Mnemonic == "fsts" ||
+ Mnemonic == "fcpys" || Mnemonic == "fdivs" || Mnemonic == "fmuls" ||
+ Mnemonic == "fcmps" || Mnemonic == "fcmpzs" || Mnemonic == "vfms" ||
+ Mnemonic == "vfnms" || Mnemonic == "fconsts" || Mnemonic == "bxns" ||
+ Mnemonic == "blxns" || Mnemonic == "vfmas" || Mnemonic == "vmlas" ||
(Mnemonic == "movs" && isThumb()))) {
Mnemonic = Mnemonic.slice(0, Mnemonic.size() - 1);
CarrySetting = true;
@@ -6405,8 +6398,7 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic,
if (Mnemonic.starts_with("vpst")) {
ITMask = Mnemonic.slice(4, Mnemonic.size());
Mnemonic = Mnemonic.slice(0, 4);
- }
- else if (Mnemonic.starts_with("vpt")) {
+ } else if (Mnemonic.starts_with("vpt")) {
ITMask = Mnemonic.slice(3, Mnemonic.size());
Mnemonic = Mnemonic.slice(0, 3);
}
@@ -6446,24 +6438,21 @@ void ARMAsmParser::getMnemonicAcceptInfo(StringRef Mnemonic,
Mnemonic == "vminnm" || Mnemonic == "vcvta" || Mnemonic == "vcvtn" ||
Mnemonic == "vcvtp" || Mnemonic == "vcvtm" || Mnemonic == "vrinta" ||
Mnemonic == "vrintn" || Mnemonic == "vrintp" || Mnemonic == "vrintm" ||
- Mnemonic.starts_with("aes") || Mnemonic == "hvc" || Mnemonic == "setpan" ||
- Mnemonic.starts_with("sha1") || Mnemonic.starts_with("sha256") ||
+ Mnemonic.starts_with("aes") || Mnemonic == "hvc" ||
+ Mnemonic == "setpan" || Mnemonic.starts_with("sha1") ||
+ Mnemonic.starts_with("sha256") ||
(FullInst.starts_with("vmull") && FullInst.ends_with(".p64")) ||
- Mnemonic == "vmovx" || Mnemonic == "vins" ||
- Mnemonic == "vudot" || Mnemonic == "vsdot" ||
- Mnemonic == "vcmla" || Mnemonic == "vcadd" ||
- Mnemonic == "vfmal" || Mnemonic == "vfmsl" ||
- Mnemonic == "vfmat" || Mnemonic == "vfmab" ||
- Mnemonic == "vdot" || Mnemonic == "vmmla" ||
- Mnemonic == "sb" || Mnemonic == "ssbb" ||
- Mnemonic == "pssbb" || Mnemonic == "vsmmla" ||
- Mnemonic == "vummla" || Mnemonic == "vusmmla" ||
- Mnemonic == "vusdot" || Mnemonic == "vsudot" ||
- Mnemonic == "bfcsel" || Mnemonic == "wls" ||
- Mnemonic == "dls" || Mnemonic == "le" || Mnemonic == "csel" ||
- Mnemonic == "csinc" || Mnemonic == "csinv" || Mnemonic == "csneg" ||
- Mnemonic == "cinc" || Mnemonic == "cinv" || Mnemonic == "cneg" ||
- Mnemonic == "cset" || Mnemonic == "csetm" ||
+ Mnemonic == "vmovx" || Mnemonic == "vins" || Mnemonic == "vudot" ||
+ Mnemonic == "vsdot" || Mnemonic == "vcmla" || Mnemonic == "vcadd" ||
+ Mnemonic == "vfmal" || Mnemonic == "vfmsl" || Mnemonic == "vfmat" ||
+ Mnemonic == "vfmab" || Mnemonic == "vdot" || Mnemonic == "vmmla" ||
+ Mnemonic == "sb" || Mnemonic == "ssbb" || Mnemonic == "pssbb" ||
+ Mnemonic == "vsmmla" || Mnemonic == "vummla" || Mnemonic == "vusmmla" ||
+ Mnemonic == "vusdot" || Mnemonic == "vsudot" || Mnemonic == "bfcsel" ||
+ Mnemonic == "wls" || Mnemonic == "dls" || Mnemonic == "le" ||
+ Mnemonic == "csel" || Mnemonic == "csinc" || Mnemonic == "csinv" ||
+ Mnemonic == "csneg" || Mnemonic == "cinc" || Mnemonic == "cinv" ||
+ Mnemonic == "cneg" || Mnemonic == "cset" || Mnemonic == "csetm" ||
(hasCDE() && MS.isCDEInstr(Mnemonic) &&
!MS.isITPredicableCDEInstr(Mnemonic)) ||
Mnemonic.starts_with("vpt") || Mnemonic.starts_with("vpst") ||
@@ -6484,8 +6473,7 @@ void ARMAsmParser::getMnemonicAcceptInfo(StringRef Mnemonic,
Mnemonic != "dmb" && Mnemonic != "dfb" && Mnemonic != "dsb" &&
Mnemonic != "isb" && Mnemonic != "pld" && Mnemonic != "pli" &&
Mnemonic != "pldw" && Mnemonic != "ldc2" && Mnemonic != "ldc2l" &&
- Mnemonic != "stc2" && Mnemonic != "stc2l" &&
- Mnemonic != "tsb" &&
+ Mnemonic != "stc2" && Mnemonic != "stc2l" && Mnemonic != "tsb" &&
!Mnemonic.starts_with("rfe") && !Mnemonic.starts_with("srs");
} else if (isThumbOne()) {
if (hasV6MOps())
@@ -7228,7 +7216,8 @@ bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
// operand if that is the case.
else if (Mnemonic == "vmov" || Mnemonic.starts_with("vcmp") ||
(Mnemonic.starts_with("vcvt") && !Mnemonic.starts_with("vcvta") &&
- !Mnemonic.starts_with("vcvtn") && !Mnemonic.starts_with("vcvtp") &&
+ !Mnemonic.starts_with("vcvtn") &&
+ !Mnemonic.starts_with("vcvtp") &&
!Mnemonic.starts_with("vcvtm"))) {
if (!shouldOmitVectorPredicateOperand(Mnemonic, Operands)) {
// We could not split the vector predicate off vcvt because it might
@@ -7241,7 +7230,7 @@ bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
auto Sz1 = static_cast<ARMOperand &>(*Operands[2]);
auto Sz2 = static_cast<ARMOperand &>(*Operands[3]);
if (!(Sz1.isToken() && Sz1.getToken().starts_with(".f") &&
- Sz2.isToken() && Sz2.getToken().starts_with(".f"))) {
+ Sz2.isToken() && Sz2.getToken().starts_with(".f"))) {
Operands.erase(Operands.begin());
SMLoc MLoc = SMLoc::getFromPointer(NameLoc.getPointer());
VPTPredicationCode = ARMVCC::Then;
diff --git a/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp b/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
index 42287758c9..21d5f7653a 100644
--- a/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
+++ b/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
@@ -932,8 +932,10 @@ StringRef VEAsmParser::splitMnemonic(StringRef Name, SMLoc NameLoc,
Mnemonic = parseRD(Name, 10, NameLoc, Operands);
} else if (Name.starts_with("cvt.l.d")) {
Mnemonic = parseRD(Name, 7, NameLoc, Operands);
- } else if (Name.starts_with("vcvt.w.d.sx") || Name.starts_with("vcvt.w.d.zx") ||
- Name.starts_with("vcvt.w.s.sx") || Name.starts_with("vcvt.w.s.zx")) {
+ } else if (Name.starts_with("vcvt.w.d.sx") ||
+ Name.starts_with("vcvt.w.d.zx") ||
+ Name.starts_with("vcvt.w.s.sx") ||
+ Name.starts_with("vcvt.w.s.zx")) {
Mnemonic = parseRD(Name, 11, NameLoc, Operands);
} else if (Name.starts_with("vcvt.l.d")) {
Mnemonic = parseRD(Name, 8, NameLoc, Operands);
@@ -946,8 +948,10 @@ StringRef VEAsmParser::splitMnemonic(StringRef Name, SMLoc NameLoc,
Name.starts_with("vfmk.d.") || Name.starts_with("vfmk.s.")) {
bool ICC = Name[5] == 'l' || Name[5] == 'w' ? true : false;
Mnemonic = parseCC(Name, 7, Name.size(), ICC, true, NameLoc, Operands);
- } else if (Name.starts_with("pvfmk.w.lo.") || Name.starts_with("pvfmk.w.up.") ||
- Name.starts_with("pvfmk.s.lo.") || Name.starts_with("pvfmk.s.up.")) {
+ } else if (Name.starts_with("pvfmk.w.lo.") ||
+ Name.starts_with("pvfmk.w.up.") ||
+ Name.starts_with("pvfmk.s.lo.") ||
+ Name.starts_with("pvfmk.s.up.")) {
bool ICC = Name[6] == 'l' || Name[6] == 'w' ? true : false;
Mnemonic = parseCC(Name, 11, Name.size(), ICC, true, NameLoc, Operands);
} else {
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index a01d710d6a..e78d160564 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -3334,7 +3334,6 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
}
}
-
// Determine whether this is an instruction prefix.
// FIXME:
// Enhance prefixes integrity robustness. for example, following forms
diff --git a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
index f1904ea159..73c0f5430d 100644
--- a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
@@ -211,8 +211,8 @@ static const char *isInvalidOpcode(const Instruction &Instr) {
if ((Instr.Description.TSFlags & X86II::FormMask) == X86II::Pseudo)
return "unsupported opcode: pseudo instruction";
if ((OpcodeName.starts_with("POP") && !OpcodeName.starts_with("POPCNT")) ||
- OpcodeName.starts_with("PUSH") || OpcodeName.starts_with("ADJCALLSTACK") ||
- OpcodeName.starts_with("LEAVE"))
+ OpcodeName.starts_with("PUSH") ||
+ OpcodeName.starts_with("ADJCALLSTACK") || OpcodeName.starts_with("LEAVE"))
return "unsupported opcode: Push/Pop/AdjCallStack/Leave";
switch (Instr.Description.Opcode) {
case X86::LFS16rm:
``````````
</details>
https://github.com/llvm/llvm-project/pull/74956
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