[lld] [lld][LoongArch] Support the R_LARCH_CALL36 relocation type (PR #73346)

Lu Weining via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 7 19:13:47 PST 2023


https://github.com/SixWeining updated https://github.com/llvm/llvm-project/pull/73346

>From 7cd89c32b329cdfc7065db4be64b1b70c30da0a7 Mon Sep 17 00:00:00 2001
From: Weining Lu <luweining at loongson.cn>
Date: Mon, 20 Nov 2023 22:36:41 +0800
Subject: [PATCH 1/2] [lld][LoongArch] Support the R_LARCH_CALL36 relocation
 type

R_LARCH_CALL36 was designed for function call on medium code model
where the 2 instructions (pcaddu18i + jirl) must be adjacent. This is
expected to replace current medium code model implementation, i.e.
R_LARCH_PCALA_{HI20,LO12} on pcalau12i + jirl.

See https://github.com/loongson/la-abi-specs/pull/3 for more details.
---
 lld/ELF/Arch/LoongArch.cpp             | 15 ++++++++++
 lld/test/ELF/loongarch-call36-shared.s | 41 ++++++++++++++++++++++++++
 lld/test/ELF/loongarch-call36.s        | 40 +++++++++++++++++++++++++
 3 files changed, 96 insertions(+)
 create mode 100644 lld/test/ELF/loongarch-call36-shared.s
 create mode 100644 lld/test/ELF/loongarch-call36.s

diff --git a/lld/ELF/Arch/LoongArch.cpp b/lld/ELF/Arch/LoongArch.cpp
index 1c3e015efc164..27244c68aab56 100644
--- a/lld/ELF/Arch/LoongArch.cpp
+++ b/lld/ELF/Arch/LoongArch.cpp
@@ -463,6 +463,7 @@ RelExpr LoongArch::getRelExpr(const RelType type, const Symbol &s,
   case R_LARCH_B16:
   case R_LARCH_B21:
   case R_LARCH_B26:
+  case R_LARCH_CALL36:
     return R_PLT_PC;
   case R_LARCH_GOT_PC_HI20:
   case R_LARCH_GOT64_PC_LO20:
@@ -590,6 +591,20 @@ void LoongArch::relocate(uint8_t *loc, const Relocation &rel,
     write32le(loc, setD10k16(read32le(loc), val >> 2));
     return;
 
+  case R_LARCH_CALL36: {
+    // This relocation type is designed for the adjancent pcaddu18i+jirl pair,
+    // so patch these 2 instructions in one time.
+    checkInt(loc, val, 38, rel);
+    checkAlignment(loc, val, 4, rel);
+    // Since jirl performs sign extension on the offset immediate, adds (1<<17)
+    // to original val to get the correct hi20.
+    uint32_t hi20 = extractBits(val + (1 << 17), 37, 18);
+    uint32_t lo18 = val & (1 << 18) - 1;
+    write32le(loc, setJ20(read32le(loc), hi20));
+    write32le(loc + 4, setK16(read32le(loc + 4), lo18 >> 2));
+    return;
+  }
+
   // Relocs intended for `addi`, `ld` or `st`.
   case R_LARCH_PCALA_LO12:
     // We have to again inspect the insn word to handle the R_LARCH_PCALA_LO12
diff --git a/lld/test/ELF/loongarch-call36-shared.s b/lld/test/ELF/loongarch-call36-shared.s
new file mode 100644
index 0000000000000..937f79bbb1799
--- /dev/null
+++ b/lld/test/ELF/loongarch-call36-shared.s
@@ -0,0 +1,41 @@
+# REQUIRES: loongarch
+# RUN: rm -rf %t && split-file %s %t
+# RUN: llvm-mc --filetype=obj --triple=loongarch64-unknown-elf %t/a.s -o %t/a.o
+# RUN: ld.lld %t/a.o -shared -T %t/a.t -o %t/a.so
+# RUN: llvm-readelf -x .got.plt %t/a.so | FileCheck --check-prefix=GOTPLT %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t/a.so | FileCheck %s
+
+## PLT should be present in this case.
+# CHECK:       Disassembly of section .plt:
+# CHECK:       <.plt>:
+##             bar at plt:
+# CHECK:       1234520:  pcaddu12i $t3, 64{{$}}
+# CHECK-NEXT:            ld.d $t3, $t3, 536{{$}}
+# CHECK-NEXT:            jirl $t1, $t3, 0
+# CHECK-NEXT:            nop
+
+# CHECK:      Disassembly of section .text:
+# CHECK:      <foo>:
+## hi20 = bar at plt - pc + (1 << 17) >> 18 = 0x1234520 - 0x1274670 + 0x20000 >> 18 = -1
+## lo18 = bar at plt - pc & (1 << 18) - 1 = 0x1234520 - 0x1274670 & 0x3ffff = -336
+# CHECK-NEXT: pcaddu18i $t0, -1{{$}}
+# CHECK-NEXT: jirl $zero, $t0, -336{{$}}
+
+# GOTPLT:      section '.got.plt':
+# GOTPLT-NEXT: 0x01274728 00000000 00000000 00000000 00000000
+# GOTPLT-NEXT: 0x01274738 00452301 00000000
+
+#--- a.t
+SECTIONS {
+ .plt   0x1234500: { *(.plt) }
+ .text  0x1274670: { *(.text) }
+}
+
+#--- a.s
+.text
+.global foo
+.global bar
+foo:
+    pcaddu18i $t0, 0
+    jirl      $zero, $t0, 0
+    .reloc foo, R_LARCH_CALL36, bar
diff --git a/lld/test/ELF/loongarch-call36.s b/lld/test/ELF/loongarch-call36.s
new file mode 100644
index 0000000000000..f32da0a123fe0
--- /dev/null
+++ b/lld/test/ELF/loongarch-call36.s
@@ -0,0 +1,40 @@
+# REQUIRES: loongarch
+
+# RUN: llvm-mc --filetype=obj --triple=loongarch64-unknown-elf %s -o %t.o
+
+# RUN: ld.lld %t.o --section-start=.text=0x20010 --section-start=.sec.foo=0x60020 -o %t1
+# RUN: llvm-objdump --no-show-raw-insn -d %t1 | FileCheck --match-full-lines %s --check-prefix=CASE1
+## hi20 = target - pc + (1 << 17) >> 18 = 0x60020 - 0x20010 + 0x20000 >> 18 = 1
+## lo18 = target - pc & (1 << 18) - 1 = 0x60020 - 0x20010 & 0x3ffff = 16
+# CASE1:      20010: pcaddu18i $ra, 1
+# CASE1-NEXT: 20014: jirl $zero, $ra, 16
+
+# RUN: ld.lld %t.o --section-start=.text=0x20010 --section-start=.sec.foo=0x40020 -o %t2
+# RUN: llvm-objdump --no-show-raw-insn -d %t2 | FileCheck --match-full-lines %s --check-prefix=CASE2
+## hi20 = target - pc + (1 << 17) >> 18 = 0x40020 - 0x20010 + 0x20000 >> 18 = 1
+## lo18 = target - pc & (1 << 18) - 1 = 0x40020 - 0x20010 & 0x3ffff = -131056
+# CASE2:      20010: pcaddu18i $ra, 1
+# CASE2-NEXT: 20014: jirl $zero, $ra, -131056
+
+# RUN: not ld.lld %t.o --section-start=.text=0x20000 --section-start=.sec.foo=0x2000020000 -o /dev/null 2>&1 | \
+# RUN:   FileCheck -DFILE=%t.o --check-prefix=ERROR-RANGE %s
+# ERROR-RANGE: error: [[FILE]]:(.text+0x0): relocation R_LARCH_CALL36 out of range: 137438953472 is not in [-137438953472, 137438953471]; references 'foo'
+
+## Impossible case in reality becasue all LoongArch instructions are fixed 4-bytes long.
+# RUN: not ld.lld %t.o --section-start=.text=0x20000 --section-start=.sec.foo=0x40001 -o /dev/null 2>&1 | \
+# RUN:   FileCheck -DFILE=%t.o --check-prefix=ERROR-ALIGN %s
+# ERROR-ALIGN: error: [[FILE]]:(.text+0x0): improper alignment for relocation R_LARCH_CALL36: 0x20001 is not aligned to 4 bytes
+
+.text
+.global _start
+_start:
+1:
+  pcaddu18i $ra, 0
+  jirl $zero, $ra, 0
+  .reloc 1b, R_LARCH_CALL36, foo
+
+.section .sec.foo,"ax"
+.global foo
+foo:
+  nop
+  ret

>From 883669b524175522b2a61f823adfcef5ba08a310 Mon Sep 17 00:00:00 2001
From: Weining Lu <luweining at loongson.cn>
Date: Fri, 8 Dec 2023 11:12:31 +0800
Subject: [PATCH 2/2] Address @Maskray and @MQ-mengqing's comments.

---
 lld/ELF/Arch/LoongArch.cpp             | 10 ++--
 lld/test/ELF/loongarch-call36-shared.s | 41 ----------------
 lld/test/ELF/loongarch-call36.s        | 65 +++++++++++++++++++-------
 3 files changed, 54 insertions(+), 62 deletions(-)
 delete mode 100644 lld/test/ELF/loongarch-call36-shared.s

diff --git a/lld/ELF/Arch/LoongArch.cpp b/lld/ELF/Arch/LoongArch.cpp
index 27244c68aab56..47180a8a41225 100644
--- a/lld/ELF/Arch/LoongArch.cpp
+++ b/lld/ELF/Arch/LoongArch.cpp
@@ -592,9 +592,13 @@ void LoongArch::relocate(uint8_t *loc, const Relocation &rel,
     return;
 
   case R_LARCH_CALL36: {
-    // This relocation type is designed for the adjancent pcaddu18i+jirl pair,
-    // so patch these 2 instructions in one time.
-    checkInt(loc, val, 38, rel);
+    // This relocation is designed for the adjancent pcaddu18i+jirl pair that
+    // are patched in one time. Because of sign extension of these insns'
+    // immediate fields, the relocation range is [-128G - 0x20000, +128G -
+    // 0x20000) (of course must be 4-bytes aligned).
+    if (((int64_t)val + 0x20000) != llvm::SignExtend64(val + 0x20000, 38))
+      reportRangeError(loc, rel, Twine(val), llvm::minIntN(38) - 0x20000,
+                       llvm::maxIntN(38) - 0x20000);
     checkAlignment(loc, val, 4, rel);
     // Since jirl performs sign extension on the offset immediate, adds (1<<17)
     // to original val to get the correct hi20.
diff --git a/lld/test/ELF/loongarch-call36-shared.s b/lld/test/ELF/loongarch-call36-shared.s
deleted file mode 100644
index 937f79bbb1799..0000000000000
--- a/lld/test/ELF/loongarch-call36-shared.s
+++ /dev/null
@@ -1,41 +0,0 @@
-# REQUIRES: loongarch
-# RUN: rm -rf %t && split-file %s %t
-# RUN: llvm-mc --filetype=obj --triple=loongarch64-unknown-elf %t/a.s -o %t/a.o
-# RUN: ld.lld %t/a.o -shared -T %t/a.t -o %t/a.so
-# RUN: llvm-readelf -x .got.plt %t/a.so | FileCheck --check-prefix=GOTPLT %s
-# RUN: llvm-objdump -d --no-show-raw-insn %t/a.so | FileCheck %s
-
-## PLT should be present in this case.
-# CHECK:       Disassembly of section .plt:
-# CHECK:       <.plt>:
-##             bar at plt:
-# CHECK:       1234520:  pcaddu12i $t3, 64{{$}}
-# CHECK-NEXT:            ld.d $t3, $t3, 536{{$}}
-# CHECK-NEXT:            jirl $t1, $t3, 0
-# CHECK-NEXT:            nop
-
-# CHECK:      Disassembly of section .text:
-# CHECK:      <foo>:
-## hi20 = bar at plt - pc + (1 << 17) >> 18 = 0x1234520 - 0x1274670 + 0x20000 >> 18 = -1
-## lo18 = bar at plt - pc & (1 << 18) - 1 = 0x1234520 - 0x1274670 & 0x3ffff = -336
-# CHECK-NEXT: pcaddu18i $t0, -1{{$}}
-# CHECK-NEXT: jirl $zero, $t0, -336{{$}}
-
-# GOTPLT:      section '.got.plt':
-# GOTPLT-NEXT: 0x01274728 00000000 00000000 00000000 00000000
-# GOTPLT-NEXT: 0x01274738 00452301 00000000
-
-#--- a.t
-SECTIONS {
- .plt   0x1234500: { *(.plt) }
- .text  0x1274670: { *(.text) }
-}
-
-#--- a.s
-.text
-.global foo
-.global bar
-foo:
-    pcaddu18i $t0, 0
-    jirl      $zero, $t0, 0
-    .reloc foo, R_LARCH_CALL36, bar
diff --git a/lld/test/ELF/loongarch-call36.s b/lld/test/ELF/loongarch-call36.s
index f32da0a123fe0..039d9d800d01a 100644
--- a/lld/test/ELF/loongarch-call36.s
+++ b/lld/test/ELF/loongarch-call36.s
@@ -1,40 +1,69 @@
 # REQUIRES: loongarch
 
-# RUN: llvm-mc --filetype=obj --triple=loongarch64-unknown-elf %s -o %t.o
+# RUN: rm -rf %t && split-file %s %t
+# RUN: llvm-mc --filetype=obj --triple=loongarch64-unknown-elf %t/a.s -o %t/a.o
 
-# RUN: ld.lld %t.o --section-start=.text=0x20010 --section-start=.sec.foo=0x60020 -o %t1
-# RUN: llvm-objdump --no-show-raw-insn -d %t1 | FileCheck --match-full-lines %s --check-prefix=CASE1
+# RUN: ld.lld %t/a.o --section-start=.text=0x20010 --section-start=.sec.foo=0x60020 -o %t/exe1
+# RUN: llvm-objdump --no-show-raw-insn -d %t/exe1 | FileCheck --match-full-lines %s --check-prefix=EXE1
 ## hi20 = target - pc + (1 << 17) >> 18 = 0x60020 - 0x20010 + 0x20000 >> 18 = 1
 ## lo18 = target - pc & (1 << 18) - 1 = 0x60020 - 0x20010 & 0x3ffff = 16
-# CASE1:      20010: pcaddu18i $ra, 1
-# CASE1-NEXT: 20014: jirl $zero, $ra, 16
+# EXE1:      20010: pcaddu18i $ra, 1
+# EXE1-NEXT: 20014: jirl $zero, $ra, 16
 
-# RUN: ld.lld %t.o --section-start=.text=0x20010 --section-start=.sec.foo=0x40020 -o %t2
-# RUN: llvm-objdump --no-show-raw-insn -d %t2 | FileCheck --match-full-lines %s --check-prefix=CASE2
+# RUN: ld.lld %t/a.o --section-start=.text=0x20010 --section-start=.sec.foo=0x40020 -o %t/exe2
+# RUN: llvm-objdump --no-show-raw-insn -d %t/exe2 | FileCheck --match-full-lines %s --check-prefix=EXE2
 ## hi20 = target - pc + (1 << 17) >> 18 = 0x40020 - 0x20010 + 0x20000 >> 18 = 1
 ## lo18 = target - pc & (1 << 18) - 1 = 0x40020 - 0x20010 & 0x3ffff = -131056
-# CASE2:      20010: pcaddu18i $ra, 1
-# CASE2-NEXT: 20014: jirl $zero, $ra, -131056
+# EXE2:      20010: pcaddu18i $ra, 1
+# EXE2-NEXT: 20014: jirl $zero, $ra, -131056
 
-# RUN: not ld.lld %t.o --section-start=.text=0x20000 --section-start=.sec.foo=0x2000020000 -o /dev/null 2>&1 | \
-# RUN:   FileCheck -DFILE=%t.o --check-prefix=ERROR-RANGE %s
-# ERROR-RANGE: error: [[FILE]]:(.text+0x0): relocation R_LARCH_CALL36 out of range: 137438953472 is not in [-137438953472, 137438953471]; references 'foo'
+# RUN: ld.lld %t/a.o -shared -T %t/a.t -o %t/a.so
+# RUN: llvm-readelf -x .got.plt %t/a.so | FileCheck --check-prefix=GOTPLT %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t/a.so | FileCheck --check-prefix=SO %s
+## PLT should be present in this case.
+# SO:    Disassembly of section .plt:
+# SO:    <.plt>:
+##       foo at plt:
+# SO:    1234520:  pcaddu12i $t3, 64{{$}}
+# SO-NEXT:         ld.d $t3, $t3, 544{{$}}
+# SO-NEXT:         jirl $t1, $t3, 0
+# SO-NEXT:         nop
+
+# SO:   Disassembly of section .text:
+# SO:   <_start>:
+## hi20 = foo at plt - pc + (1 << 17) >> 18 = 0x1234520 - 0x1274670 + 0x20000 >> 18 = -1
+## lo18 = foo at plt - pc & (1 << 18) - 1 = 0x1234520 - 0x1274670 & 0x3ffff = -336
+# SO-NEXT: pcaddu18i $ra, -1{{$}}
+# SO-NEXT: jirl $zero, $ra, -336{{$}}
+
+# GOTPLT:      section '.got.plt':
+# GOTPLT-NEXT: 0x01274730 00000000 00000000 00000000 00000000
+# GOTPLT-NEXT: 0x01274740 00452301 00000000
+
+# RUN: not ld.lld %t/a.o --section-start=.text=0x20000 --section-start=.sec.foo=0x2000020000 -o /dev/null 2>&1 | \
+# RUN:   FileCheck -DFILE=%t/a.o --check-prefix=ERROR-RANGE %s
+# ERROR-RANGE: error: [[FILE]]:(.text+0x0): relocation R_LARCH_CALL36 out of range: 137438953472 is not in [-137439084544, 137438822399]; references 'foo'
 
 ## Impossible case in reality becasue all LoongArch instructions are fixed 4-bytes long.
-# RUN: not ld.lld %t.o --section-start=.text=0x20000 --section-start=.sec.foo=0x40001 -o /dev/null 2>&1 | \
-# RUN:   FileCheck -DFILE=%t.o --check-prefix=ERROR-ALIGN %s
+# RUN: not ld.lld %t/a.o --section-start=.text=0x20000 --section-start=.sec.foo=0x40001 -o /dev/null 2>&1 | \
+# RUN:   FileCheck -DFILE=%t/a.o --check-prefix=ERROR-ALIGN %s
 # ERROR-ALIGN: error: [[FILE]]:(.text+0x0): improper alignment for relocation R_LARCH_CALL36: 0x20001 is not aligned to 4 bytes
 
+#--- a.t
+SECTIONS {
+ .plt   0x1234500: { *(.plt) }
+ .text  0x1274670: { *(.text) }
+}
+
+#--- a.s
 .text
 .global _start
 _start:
-1:
+  .reloc ., R_LARCH_CALL36, foo
   pcaddu18i $ra, 0
-  jirl $zero, $ra, 0
-  .reloc 1b, R_LARCH_CALL36, foo
+  jirl      $zero, $ra, 0
 
 .section .sec.foo,"ax"
 .global foo
 foo:
-  nop
   ret



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