[llvm] [RISCV] Initial ISel support for the experimental zacas extension (PR #67918)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 4 19:16:12 PST 2023


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@@ -728,6 +807,72 @@ bool RISCVExpandAtomicPseudo::expandAtomicCmpXchg(
   return true;
 }
 
+static Register getGPRPairEvenReg(Register PairedReg) {
+  switch (PairedReg) {
----------------
topperc wrote:

Can we do

`(PairedReg - RISCV::X0_PD) * 2 + RISCV::X0` or you can probably ask TargetRegisterInfo for the encoding value of PairedReg and add that to RISCV::X0.

https://github.com/llvm/llvm-project/pull/67918


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