[llvm] [RISCV] Allocate the varargs GPR save area as a single object. (PR #74354)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 4 10:31:27 PST 2023


================
@@ -1060,14 +1060,14 @@ define i32 @varargs(ptr %fmt, ...) nounwind {
 ; RV64IZCMP-SR-NEXT:    sd a5, 56(sp)
 ; RV64IZCMP-SR-NEXT:    sd a4, 48(sp)
 ; RV64IZCMP-SR-NEXT:    sd a3, 40(sp)
-; RV64IZCMP-SR-NEXT:    sd a2, 32(sp)
-; RV64IZCMP-SR-NEXT:    sd a1, 24(sp)
 ; RV64IZCMP-SR-NEXT:    addi a0, sp, 24
 ; RV64IZCMP-SR-NEXT:    sd a0, 8(sp)
 ; RV64IZCMP-SR-NEXT:    lwu a0, 12(sp)
-; RV64IZCMP-SR-NEXT:    lwu a1, 8(sp)
+; RV64IZCMP-SR-NEXT:    lwu a3, 8(sp)
----------------
topperc wrote:

This test is kind of weird, all the alignments are 4 instead of XLen/8. This leads to memory access splitting on RV64 that isn't seen on RV32.

https://github.com/llvm/llvm-project/pull/74354


More information about the llvm-commits mailing list