[clang] [llvm] [SME2] Add LUTI2 and LUTI4 double Builtins and Intrinsics (PR #73305)

Sander de Smalen via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 1 01:56:53 PST 2023


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@@ -298,3 +298,11 @@ multiclass ZAAddSub<string n_suffix> {
 
 defm SVADD : ZAAddSub<"add">;
 defm SVSUB : ZAAddSub<"sub">;
+
+//
+// lookup table expand two contiguous registers
+//
+let TargetGuard = "sme2" in {
+  def SVLUTI2_LANE_ZT_X2 : Inst<"svluti2_lane_zt_{d}_x2", "2.dmdm", "cUcsUsiUibhf", MergeNone, "aarch64_sme_luti2_lane_zt_x2", [IsStreaming, IsSharedZA, IsPreservesZA], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_7>]>;
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sdesmalen-arm wrote:

Another thing is that the second input parameter must now always be `svuint8_t`, it can not be the default overloaded type, as per https://github.com/ARM-software/acle/pull/278

https://github.com/llvm/llvm-project/pull/73305


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