[llvm] [llvm][PowerPC] Correct handling of spill slots for SPE when EXPENSIVE_CHECKS is enabled (PR #73940)

[Ivan Kosarev via llvm-commits]

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@@ -2334,24 +2334,16 @@ bool PPCFrameLowering::assignCalleeSavedSpillSlots(
     // In case of SPE we only have SuperRegs and CRs
     // in our CalleSaveInfo vector.
 
-    unsigned Idx = 0;
     for (auto &CalleeSaveReg : CSI) {
       const MCPhysReg &Reg = CalleeSaveReg.getReg();
       const MCPhysReg &Lower = RegInfo->getSubReg(Reg, 1);
       const MCPhysReg &Higher = RegInfo->getSubReg(Reg, 2);
 
-      // Check only for SuperRegs.
-      if (Lower) {
-        if (MRI.isPhysRegModified(Higher)) {
-          Idx++;
-          continue;
-        } else {
+      if ( // Check only for SuperRegs.
+          Lower &&
           // Replace Reg if only lower-32 bits modified
-          CSI.erase(CSI.begin() + Idx);
-          CSI.insert(CSI.begin() + Idx, CalleeSavedInfo(Lower));
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kosarev wrote:

Can `CSI` be passed as `ArrayRef` now?

https://github.com/llvm/llvm-project/pull/73940