[llvm] GlobalISel lane masks merging (PR #73337)

Pierre van Houtryve via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 28 06:00:24 PST 2023


================
@@ -207,7 +207,39 @@ bool AMDGPUInstructionSelector::selectCOPY(MachineInstr &I) const {
   return true;
 }
 
+bool isLaneMask(Register Reg, MachineRegisterInfo *MRI,
+                const SIRegisterInfo &TRI) {
+  if (MRI->getType(Reg) != LLT::scalar(1))
+    return false;
+  const TargetRegisterClass *RC = MRI->getRegClassOrNull(Reg);
+  if (!RC || !TRI.isSGPRClass(RC))
+    return false;
+
+  return true;
----------------
Pierre-vh wrote:

`return RC && TRI.isSGPRClass(RC);`

https://github.com/llvm/llvm-project/pull/73337


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