[llvm] [SelectionDAG] Add support to filter SelectionDAG dumps during ISel by function names (PR #72696)

Min-Yih Hsu via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 20 13:29:43 PST 2023


https://github.com/mshockwave updated https://github.com/llvm/llvm-project/pull/72696

>From 264ab349af5faf62667a899fc2c4f20395a8348d Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Fri, 17 Nov 2023 12:00:59 -0800
Subject: [PATCH 1/8] [SelectionDAG] Add a flag to filter ISel traces by
 function name

With `-filter-print-dags-funcs=<function names>`, `-debug-only=isel`
will only print out traces that match the given function names.
---
 .../CodeGen/SelectionDAG/SelectionDAGISel.cpp | 110 +++++++++++-------
 .../Generic/selectiondag-dump-filter.ll       |  28 +++++
 2 files changed, 97 insertions(+), 41 deletions(-)
 create mode 100644 llvm/test/CodeGen/Generic/selectiondag-dump-filter.ll

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 0a8afa782f1ca47..a4d861178acc832 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -142,6 +142,12 @@ UseMBPI("use-mbpi",
         cl::init(true), cl::Hidden);
 
 #ifndef NDEBUG
+static cl::list<std::string> FilterDAGFuncNames(
+    "filter-print-dags-funcs", cl::Hidden, cl::value_desc("function names"),
+    cl::desc("Only print DAGs of functions whose names "
+             "are in this list for all debug-only=" DEBUG_TYPE " traces"),
+    cl::CommaSeparated);
+
 static cl::opt<std::string>
 FilterDAGBasicBlockName("filter-view-dags", cl::Hidden,
                         cl::desc("Only display the basic block whose name "
@@ -180,6 +186,19 @@ static const bool ViewDAGCombine1 = false, ViewLegalizeTypesDAGs = false,
                   ViewSchedDAGs = false, ViewSUnitDAGs = false;
 #endif
 
+/// True if the current processing function matches any of the names in
+/// FilterDAGFuncNames. Ideally this variable should be a member of
+/// SelectionDAGISel but some of the static functions in this file also print
+/// traces subject to filter.
+static bool MatchFilterFuncs = false;
+
+#define ISEL_TRACE(X)                                                          \
+  do {                                                                         \
+    if (MatchFilterFuncs) {                                                    \
+      LLVM_DEBUG(X);                                                           \
+    }                                                                          \
+  } while (false)
+
 //===---------------------------------------------------------------------===//
 ///
 /// RegisterScheduler class - Track the registration of instruction schedulers.
@@ -232,9 +251,9 @@ namespace llvm {
       if (NewOptLevel != SavedOptLevel) {
         IS.OptLevel = NewOptLevel;
         IS.TM.setOptLevel(NewOptLevel);
-        LLVM_DEBUG(dbgs() << "\nChanging optimization level for Function "
+        ISEL_TRACE(dbgs() << "\nChanging optimization level for Function "
                           << IS.MF->getFunction().getName() << "\n");
-        LLVM_DEBUG(dbgs() << "\tBefore: -O" << static_cast<int>(SavedOptLevel)
+        ISEL_TRACE(dbgs() << "\tBefore: -O" << static_cast<int>(SavedOptLevel)
                           << " ; After: -O" << static_cast<int>(NewOptLevel)
                           << "\n");
         if (NewOptLevel == CodeGenOptLevel::None)
@@ -251,10 +270,11 @@ namespace llvm {
     ~OptLevelChanger() {
       if (IS.OptLevel == SavedOptLevel)
         return;
-      LLVM_DEBUG(dbgs() << "\nRestoring optimization level for Function "
+      ISEL_TRACE(dbgs() << "\nRestoring optimization level for Function "
                         << IS.MF->getFunction().getName() << "\n");
-      LLVM_DEBUG(dbgs() << "\tBefore: -O" << static_cast<int>(IS.OptLevel)
-                        << " ; After: -O" << static_cast<int>(SavedOptLevel) << "\n");
+      ISEL_TRACE(dbgs() << "\tBefore: -O" << static_cast<int>(IS.OptLevel)
+                        << " ; After: -O" << static_cast<int>(SavedOptLevel)
+                        << "\n");
       IS.OptLevel = SavedOptLevel;
       IS.TM.setOptLevel(SavedOptLevel);
       IS.TM.setFastISel(SavedFastISel);
@@ -403,6 +423,15 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
   const Function &Fn = mf.getFunction();
   MF = &mf;
 
+#ifndef NDEBUG
+  static std::unordered_set<std::string> DumpDAGFuncNames(
+      FilterDAGFuncNames.begin(), FilterDAGFuncNames.end());
+  MatchFilterFuncs = DumpDAGFuncNames.empty() ||
+                     DumpDAGFuncNames.count(std::string(Fn.getName()));
+#else
+  (void)MatchFilterFuncs;
+#endif
+
   // Decide what flavour of variable location debug-info will be used, before
   // we change the optimisation level.
   bool InstrRef = mf.shouldUseDebugInstrRef();
@@ -436,7 +465,7 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
   if (isAssignmentTrackingEnabled(*Fn.getParent()))
     FnVarLocs = getAnalysis<AssignmentTrackingAnalysis>().getResults();
 
-  LLVM_DEBUG(dbgs() << "\n\n\n=== " << Fn.getName() << "\n");
+  ISEL_TRACE(dbgs() << "\n\n\n=== " << Fn.getName() << "\n");
 
   UniformityInfo *UA = nullptr;
   if (auto *UAPass = getAnalysisIfAvailable<UniformityInfoWrapperPass>())
@@ -576,7 +605,7 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
         // FIXME: VR def may not be in entry block.
         Def->getParent()->insert(std::next(InsertPos), MI);
       } else
-        LLVM_DEBUG(dbgs() << "Dropping debug info for dead vreg"
+        ISEL_TRACE(dbgs() << "Dropping debug info for dead vreg"
                           << Register::virtReg2Index(Reg) << "\n");
     }
 
@@ -668,8 +697,8 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
   // at this point.
   FuncInfo->clear();
 
-  LLVM_DEBUG(dbgs() << "*** MachineFunction at end of ISel ***\n");
-  LLVM_DEBUG(MF->print(dbgs()));
+  ISEL_TRACE(dbgs() << "*** MachineFunction at end of ISel ***\n");
+  ISEL_TRACE(MF->print(dbgs()));
 
   return true;
 }
@@ -687,7 +716,7 @@ static void reportFastISelFailure(MachineFunction &MF,
     report_fatal_error(Twine(R.getMsg()));
 
   ORE.emit(R);
-  LLVM_DEBUG(dbgs() << R.getMsg() << "\n");
+  ISEL_TRACE(dbgs() << R.getMsg() << "\n");
 }
 
 void SelectionDAGISel::SelectBasicBlock(BasicBlock::const_iterator Begin,
@@ -777,7 +806,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     BlockName =
         (MF->getName() + ":" + FuncInfo->MBB->getBasicBlock()->getName()).str();
   }
-  LLVM_DEBUG(dbgs() << "\nInitial selection DAG: "
+  ISEL_TRACE(dbgs() << "\nInitial selection DAG: "
                     << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
                     << "'\n";
              CurDAG->dump());
@@ -797,7 +826,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     CurDAG->Combine(BeforeLegalizeTypes, AA, OptLevel);
   }
 
-  LLVM_DEBUG(dbgs() << "\nOptimized lowered selection DAG: "
+  ISEL_TRACE(dbgs() << "\nOptimized lowered selection DAG: "
                     << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
                     << "'\n";
              CurDAG->dump());
@@ -819,7 +848,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     Changed = CurDAG->LegalizeTypes();
   }
 
-  LLVM_DEBUG(dbgs() << "\nType-legalized selection DAG: "
+  ISEL_TRACE(dbgs() << "\nType-legalized selection DAG: "
                     << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
                     << "'\n";
              CurDAG->dump());
@@ -843,7 +872,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
       CurDAG->Combine(AfterLegalizeTypes, AA, OptLevel);
     }
 
-    LLVM_DEBUG(dbgs() << "\nOptimized type-legalized selection DAG: "
+    ISEL_TRACE(dbgs() << "\nOptimized type-legalized selection DAG: "
                       << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
                       << "'\n";
                CurDAG->dump());
@@ -861,7 +890,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
   }
 
   if (Changed) {
-    LLVM_DEBUG(dbgs() << "\nVector-legalized selection DAG: "
+    ISEL_TRACE(dbgs() << "\nVector-legalized selection DAG: "
                       << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
                       << "'\n";
                CurDAG->dump());
@@ -877,7 +906,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
       CurDAG->LegalizeTypes();
     }
 
-    LLVM_DEBUG(dbgs() << "\nVector/type-legalized selection DAG: "
+    ISEL_TRACE(dbgs() << "\nVector/type-legalized selection DAG: "
                       << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
                       << "'\n";
                CurDAG->dump());
@@ -897,7 +926,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
       CurDAG->Combine(AfterLegalizeVectorOps, AA, OptLevel);
     }
 
-    LLVM_DEBUG(dbgs() << "\nOptimized vector-legalized selection DAG: "
+    ISEL_TRACE(dbgs() << "\nOptimized vector-legalized selection DAG: "
                       << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
                       << "'\n";
                CurDAG->dump());
@@ -917,7 +946,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     CurDAG->Legalize();
   }
 
-  LLVM_DEBUG(dbgs() << "\nLegalized selection DAG: "
+  ISEL_TRACE(dbgs() << "\nLegalized selection DAG: "
                     << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
                     << "'\n";
              CurDAG->dump());
@@ -937,7 +966,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     CurDAG->Combine(AfterLegalizeDAG, AA, OptLevel);
   }
 
-  LLVM_DEBUG(dbgs() << "\nOptimized legalized selection DAG: "
+  ISEL_TRACE(dbgs() << "\nOptimized legalized selection DAG: "
                     << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
                     << "'\n";
              CurDAG->dump());
@@ -961,7 +990,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     DoInstructionSelection();
   }
 
-  LLVM_DEBUG(dbgs() << "\nSelected selection DAG: "
+  ISEL_TRACE(dbgs() << "\nSelected selection DAG: "
                     << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
                     << "'\n";
              CurDAG->dump());
@@ -1092,7 +1121,7 @@ int SelectionDAGISel::getUninvalidatedNodeId(SDNode *N) {
 }
 
 void SelectionDAGISel::DoInstructionSelection() {
-  LLVM_DEBUG(dbgs() << "===== Instruction selection begins: "
+  ISEL_TRACE(dbgs() << "===== Instruction selection begins: "
                     << printMBBReference(*FuncInfo->MBB) << " '"
                     << FuncInfo->MBB->getName() << "'\n");
 
@@ -1184,7 +1213,7 @@ void SelectionDAGISel::DoInstructionSelection() {
           Node = CurDAG->mutateStrictFPToFP(Node);
       }
 
-      LLVM_DEBUG(dbgs() << "\nISEL: Starting selection on root node: ";
+      ISEL_TRACE(dbgs() << "\nISEL: Starting selection on root node: ";
                  Node->dump(CurDAG));
 
       Select(Node);
@@ -1193,7 +1222,7 @@ void SelectionDAGISel::DoInstructionSelection() {
     CurDAG->setRoot(Dummy.getValue());
   }
 
-  LLVM_DEBUG(dbgs() << "\n===== Instruction selection ends:\n");
+  ISEL_TRACE(dbgs() << "\n===== Instruction selection ends:\n");
 
   PostprocessISelDAG();
 }
@@ -1372,7 +1401,7 @@ static bool processIfEntryValueDbgDeclare(FunctionLoweringInfo &FuncInfo,
       // Append an op deref to account for the fact that this is a dbg_declare.
       Expr = DIExpression::append(Expr, dwarf::DW_OP_deref);
       FuncInfo.MF->setVariableDbgInfo(Var, Expr, PhysReg, DbgLoc);
-      LLVM_DEBUG(dbgs() << "processDbgDeclare: setVariableDbgInfo Var=" << *Var
+      ISEL_TRACE(dbgs() << "processDbgDeclare: setVariableDbgInfo Var=" << *Var
                         << ", Expr=" << *Expr << ",  MCRegister=" << PhysReg
                         << ", DbgLoc=" << DbgLoc << "\n");
       return true;
@@ -1384,7 +1413,7 @@ static bool processDbgDeclare(FunctionLoweringInfo &FuncInfo,
                               const Value *Address, DIExpression *Expr,
                               DILocalVariable *Var, DebugLoc DbgLoc) {
   if (!Address) {
-    LLVM_DEBUG(dbgs() << "processDbgDeclares skipping " << *Var
+    ISEL_TRACE(dbgs() << "processDbgDeclares skipping " << *Var
                       << " (bad address)\n");
     return false;
   }
@@ -1421,7 +1450,7 @@ static bool processDbgDeclare(FunctionLoweringInfo &FuncInfo,
     Expr = DIExpression::prepend(Expr, DIExpression::ApplyOffset,
                                  Offset.getZExtValue());
 
-  LLVM_DEBUG(dbgs() << "processDbgDeclare: setVariableDbgInfo Var=" << *Var
+  ISEL_TRACE(dbgs() << "processDbgDeclare: setVariableDbgInfo Var=" << *Var
                     << ", Expr=" << *Expr << ",  FI=" << FI
                     << ", DbgLoc=" << DbgLoc << "\n");
   MF->setVariableDbgInfo(Var, Expr, FI, DbgLoc);
@@ -1458,7 +1487,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
   // Initialize the Fast-ISel state, if needed.
   FastISel *FastIS = nullptr;
   if (TM.Options.EnableFastISel) {
-    LLVM_DEBUG(dbgs() << "Enabling fast-isel\n");
+    ISEL_TRACE(dbgs() << "Enabling fast-isel\n");
     FastIS = TLI->createFastISel(*FuncInfo, LibInfo);
   }
 
@@ -1605,7 +1634,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
               BeforeInst->hasOneUse() &&
               FastIS->tryToFoldLoad(cast<LoadInst>(BeforeInst), Inst)) {
             // If we succeeded, don't re-select the load.
-            LLVM_DEBUG(dbgs()
+            ISEL_TRACE(dbgs()
                        << "FastISel folded load: " << *BeforeInst << "\n");
             BI = std::next(BasicBlock::const_iterator(BeforeInst));
             --NumFastIselRemaining;
@@ -1742,7 +1771,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
 
 void
 SelectionDAGISel::FinishBasicBlock() {
-  LLVM_DEBUG(dbgs() << "Total amount of phi nodes to update: "
+  ISEL_TRACE(dbgs() << "Total amount of phi nodes to update: "
                     << FuncInfo->PHINodesToUpdate.size() << "\n";
              for (unsigned i = 0, e = FuncInfo->PHINodesToUpdate.size(); i != e;
                   ++i) dbgs()
@@ -2511,7 +2540,7 @@ void SelectionDAGISel::UpdateChains(
   if (!NowDeadNodes.empty())
     CurDAG->RemoveDeadNodes(NowDeadNodes);
 
-  LLVM_DEBUG(dbgs() << "ISEL: Match complete!\n");
+  ISEL_TRACE(dbgs() << "ISEL: Match complete!\n");
 }
 
 /// HandleMergeInputChains - This implements the OPC_EmitMergeInputChains
@@ -3048,7 +3077,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
   // update the chain results when the pattern is complete.
   SmallVector<SDNode*, 3> ChainNodesMatched;
 
-  LLVM_DEBUG(dbgs() << "ISEL: Starting pattern match\n");
+  ISEL_TRACE(dbgs() << "ISEL: Starting pattern match\n");
 
   // Determine where to start the interpreter.  Normally we start at opcode #0,
   // but if the state machine starts with an OPC_SwitchOpcode, then we
@@ -3060,7 +3089,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
     // Already computed the OpcodeOffset table, just index into it.
     if (N.getOpcode() < OpcodeOffset.size())
       MatcherIndex = OpcodeOffset[N.getOpcode()];
-    LLVM_DEBUG(dbgs() << "  Initial Opcode index to " << MatcherIndex << "\n");
+    ISEL_TRACE(dbgs() << "  Initial Opcode index to " << MatcherIndex << "\n");
 
   } else if (MatcherTable[0] == OPC_SwitchOpcode) {
     // Otherwise, the table isn't computed, but the state machine does start
@@ -3127,7 +3156,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
         if (!Result)
           break;
 
-        LLVM_DEBUG(
+        ISEL_TRACE(
             dbgs() << "  Skipped scope entry (due to false predicate) at "
                    << "index " << MatcherIndexOfPredicate << ", continuing at "
                    << FailIndex << "\n");
@@ -3179,7 +3208,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
       if (auto *MN = dyn_cast<MemSDNode>(N))
         MatchedMemRefs.push_back(MN->getMemOperand());
       else {
-        LLVM_DEBUG(dbgs() << "Expected MemSDNode "; N->dump(CurDAG);
+        ISEL_TRACE(dbgs() << "Expected MemSDNode "; N->dump(CurDAG);
                    dbgs() << '\n');
       }
 
@@ -3316,7 +3345,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
       if (CaseSize == 0) break;
 
       // Otherwise, execute the case we found.
-      LLVM_DEBUG(dbgs() << "  OpcodeSwitch from " << SwitchStart << " to "
+      ISEL_TRACE(dbgs() << "  OpcodeSwitch from " << SwitchStart << " to "
                         << MatcherIndex << "\n");
       continue;
     }
@@ -3348,9 +3377,8 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
       if (CaseSize == 0) break;
 
       // Otherwise, execute the case we found.
-      LLVM_DEBUG(dbgs() << "  TypeSwitch[" << CurNodeVT
-                        << "] from " << SwitchStart << " to " << MatcherIndex
-                        << '\n');
+      ISEL_TRACE(dbgs() << "  TypeSwitch[" << CurNodeVT << "] from "
+                        << SwitchStart << " to " << MatcherIndex << '\n');
       continue;
     }
     case OPC_CheckChild0Type: case OPC_CheckChild1Type:
@@ -3758,7 +3786,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
         CurDAG->setNodeMemRefs(Res, FilteredMemRefs);
       }
 
-      LLVM_DEBUG(if (!MatchedMemRefs.empty() && Res->memoperands_empty()) dbgs()
+      ISEL_TRACE(if (!MatchedMemRefs.empty() && Res->memoperands_empty()) dbgs()
                      << "  Dropping mem operands\n";
                  dbgs() << "  " << (IsMorphNodeTo ? "Morphed" : "Created")
                         << " node: ";
@@ -3824,7 +3852,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
     // If the code reached this point, then the match failed.  See if there is
     // another child to try in the current 'Scope', otherwise pop it until we
     // find a case to check.
-    LLVM_DEBUG(dbgs() << "  Match failed at index " << CurrentOpcodeIndex
+    ISEL_TRACE(dbgs() << "  Match failed at index " << CurrentOpcodeIndex
                       << "\n");
     ++NumDAGIselRetries;
     while (true) {
@@ -3845,7 +3873,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
         MatchedMemRefs.resize(LastScope.NumMatchedMemRefs);
       MatcherIndex = LastScope.FailIndex;
 
-      LLVM_DEBUG(dbgs() << "  Continuing at " << MatcherIndex << "\n");
+      ISEL_TRACE(dbgs() << "  Continuing at " << MatcherIndex << "\n");
 
       InputChain = LastScope.InputChain;
       InputGlue = LastScope.InputGlue;
diff --git a/llvm/test/CodeGen/Generic/selectiondag-dump-filter.ll b/llvm/test/CodeGen/Generic/selectiondag-dump-filter.ll
new file mode 100644
index 000000000000000..e320eb6ad13d77d
--- /dev/null
+++ b/llvm/test/CodeGen/Generic/selectiondag-dump-filter.ll
@@ -0,0 +1,28 @@
+; RUN: llc -debug-only=isel -filter-print-dags-funcs=foo < %s 2>&1 | FileCheck %s --check-prefix=FOO
+; RUN: llc -debug-only=isel -filter-print-dags-funcs=bar < %s 2>&1 | FileCheck %s --check-prefix=BAR
+; RUN: llc -debug-only=isel -filter-print-dags-funcs=foo,zap < %s 2>&1 | FileCheck %s --check-prefixes=FOO,ZAP
+; REQUIRES: asserts
+
+; FOO:     === foo
+; BAR-NOT: === foo
+; FOO: # Machine code for function foo
+define i32 @foo(i32 %a, i32 %b) {
+  %r = add i32 %a, %b
+  ret i32 %r
+}
+
+; BAR:     === bar
+; FOO-NOT: === bar
+; BAR: # Machine code for function bar
+define i32 @bar(i32 %a, i32 %b) {
+  %r = mul i32 %a, %b
+  ret i32 %r
+}
+
+; ZAP:     === zap
+; BAR-NOT: === zap
+; ZAP: # Machine code for function zap
+define i32 @zap(i32 %a, i32 %b) {
+  %r = sub i32 %a, %b
+  ret i32 %r
+}

>From cb2bbb3f0210d2f9d5acb7824ff93e1049344f6e Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Fri, 17 Nov 2023 12:05:20 -0800
Subject: [PATCH 2/8] fixup! [SelectionDAG] Add a flag to filter ISel traces by
 function name

---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index a4d861178acc832..b171b8002345a8c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -192,6 +192,8 @@ static const bool ViewDAGCombine1 = false, ViewLegalizeTypesDAGs = false,
 /// traces subject to filter.
 static bool MatchFilterFuncs = false;
 
+/// LLVM_DEBUG messages that are specific to functions filtered by
+/// `-filter-print-dags-funcs`.
 #define ISEL_TRACE(X)                                                          \
   do {                                                                         \
     if (MatchFilterFuncs) {                                                    \

>From 971c435446d991f202baaf9e1d7d445304ed553c Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Fri, 17 Nov 2023 15:41:01 -0800
Subject: [PATCH 3/8] Simplify the filtering logics

  - Re-use `-filter-print-funcs=<function names>`
  - Create a separate debug type, "isel-dump", for DAG dumps to be
  filtered by function names. Note the the original "isel" debug type
  still works the same.
---
 .../CodeGen/SelectionDAG/SelectionDAGISel.cpp | 189 +++++++++---------
 .../Generic/selectiondag-dump-filter.ll       |  11 +-
 2 files changed, 99 insertions(+), 101 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index b171b8002345a8c..990b472ed22c9f4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -78,6 +78,7 @@
 #include "llvm/IR/Intrinsics.h"
 #include "llvm/IR/IntrinsicsWebAssembly.h"
 #include "llvm/IR/Metadata.h"
+#include "llvm/IR/PrintPasses.h"
 #include "llvm/IR/Statepoint.h"
 #include "llvm/IR/Type.h"
 #include "llvm/IR/User.h"
@@ -113,6 +114,7 @@
 using namespace llvm;
 
 #define DEBUG_TYPE "isel"
+#define ISEL_DUMP_DEBUG_TYPE DEBUG_TYPE "-dump"
 
 STATISTIC(NumFastIselFailures, "Number of instructions fast isel failed on");
 STATISTIC(NumFastIselSuccess, "Number of instructions fast isel selected");
@@ -142,12 +144,6 @@ UseMBPI("use-mbpi",
         cl::init(true), cl::Hidden);
 
 #ifndef NDEBUG
-static cl::list<std::string> FilterDAGFuncNames(
-    "filter-print-dags-funcs", cl::Hidden, cl::value_desc("function names"),
-    cl::desc("Only print DAGs of functions whose names "
-             "are in this list for all debug-only=" DEBUG_TYPE " traces"),
-    cl::CommaSeparated);
-
 static cl::opt<std::string>
 FilterDAGBasicBlockName("filter-view-dags", cl::Hidden,
                         cl::desc("Only display the basic block whose name "
@@ -186,18 +182,12 @@ static const bool ViewDAGCombine1 = false, ViewLegalizeTypesDAGs = false,
                   ViewSchedDAGs = false, ViewSUnitDAGs = false;
 #endif
 
-/// True if the current processing function matches any of the names in
-/// FilterDAGFuncNames. Ideally this variable should be a member of
-/// SelectionDAGISel but some of the static functions in this file also print
-/// traces subject to filter.
-static bool MatchFilterFuncs = false;
-
-/// LLVM_DEBUG messages that are specific to functions filtered by
-/// `-filter-print-dags-funcs`.
-#define ISEL_TRACE(X)                                                          \
+#define ISEL_DUMP(F, X)                                                        \
   do {                                                                         \
-    if (MatchFilterFuncs) {                                                    \
-      LLVM_DEBUG(X);                                                           \
+    if (llvm::DebugFlag && (isCurrentDebugType(DEBUG_TYPE) ||                  \
+                            (isCurrentDebugType(ISEL_DUMP_DEBUG_TYPE) &&       \
+                             isFunctionInPrintList(F)))) {                     \
+      X;                                                                       \
     }                                                                          \
   } while (false)
 
@@ -253,9 +243,9 @@ namespace llvm {
       if (NewOptLevel != SavedOptLevel) {
         IS.OptLevel = NewOptLevel;
         IS.TM.setOptLevel(NewOptLevel);
-        ISEL_TRACE(dbgs() << "\nChanging optimization level for Function "
+        LLVM_DEBUG(dbgs() << "\nChanging optimization level for Function "
                           << IS.MF->getFunction().getName() << "\n");
-        ISEL_TRACE(dbgs() << "\tBefore: -O" << static_cast<int>(SavedOptLevel)
+        LLVM_DEBUG(dbgs() << "\tBefore: -O" << static_cast<int>(SavedOptLevel)
                           << " ; After: -O" << static_cast<int>(NewOptLevel)
                           << "\n");
         if (NewOptLevel == CodeGenOptLevel::None)
@@ -272,11 +262,10 @@ namespace llvm {
     ~OptLevelChanger() {
       if (IS.OptLevel == SavedOptLevel)
         return;
-      ISEL_TRACE(dbgs() << "\nRestoring optimization level for Function "
+      LLVM_DEBUG(dbgs() << "\nRestoring optimization level for Function "
                         << IS.MF->getFunction().getName() << "\n");
-      ISEL_TRACE(dbgs() << "\tBefore: -O" << static_cast<int>(IS.OptLevel)
-                        << " ; After: -O" << static_cast<int>(SavedOptLevel)
-                        << "\n");
+      LLVM_DEBUG(dbgs() << "\tBefore: -O" << static_cast<int>(IS.OptLevel)
+                        << " ; After: -O" << static_cast<int>(SavedOptLevel) << "\n");
       IS.OptLevel = SavedOptLevel;
       IS.TM.setOptLevel(SavedOptLevel);
       IS.TM.setFastISel(SavedFastISel);
@@ -423,17 +412,9 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
          "-fast-isel-abort > 0 requires -fast-isel");
 
   const Function &Fn = mf.getFunction();
+  StringRef FuncName = Fn.getName();
   MF = &mf;
 
-#ifndef NDEBUG
-  static std::unordered_set<std::string> DumpDAGFuncNames(
-      FilterDAGFuncNames.begin(), FilterDAGFuncNames.end());
-  MatchFilterFuncs = DumpDAGFuncNames.empty() ||
-                     DumpDAGFuncNames.count(std::string(Fn.getName()));
-#else
-  (void)MatchFilterFuncs;
-#endif
-
   // Decide what flavour of variable location debug-info will be used, before
   // we change the optimisation level.
   bool InstrRef = mf.shouldUseDebugInstrRef();
@@ -467,7 +448,7 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
   if (isAssignmentTrackingEnabled(*Fn.getParent()))
     FnVarLocs = getAnalysis<AssignmentTrackingAnalysis>().getResults();
 
-  ISEL_TRACE(dbgs() << "\n\n\n=== " << Fn.getName() << "\n");
+  ISEL_DUMP(FuncName, dbgs() << "\n\n\n=== " << FuncName << "\n");
 
   UniformityInfo *UA = nullptr;
   if (auto *UAPass = getAnalysisIfAvailable<UniformityInfoWrapperPass>())
@@ -607,7 +588,7 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
         // FIXME: VR def may not be in entry block.
         Def->getParent()->insert(std::next(InsertPos), MI);
       } else
-        ISEL_TRACE(dbgs() << "Dropping debug info for dead vreg"
+        LLVM_DEBUG(dbgs() << "Dropping debug info for dead vreg"
                           << Register::virtReg2Index(Reg) << "\n");
     }
 
@@ -699,8 +680,8 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
   // at this point.
   FuncInfo->clear();
 
-  ISEL_TRACE(dbgs() << "*** MachineFunction at end of ISel ***\n");
-  ISEL_TRACE(MF->print(dbgs()));
+  ISEL_DUMP(FuncName, dbgs() << "*** MachineFunction at end of ISel ***\n");
+  ISEL_DUMP(FuncName, MF->print(dbgs()));
 
   return true;
 }
@@ -718,7 +699,7 @@ static void reportFastISelFailure(MachineFunction &MF,
     report_fatal_error(Twine(R.getMsg()));
 
   ORE.emit(R);
-  ISEL_TRACE(dbgs() << R.getMsg() << "\n");
+  LLVM_DEBUG(dbgs() << R.getMsg() << "\n");
 }
 
 void SelectionDAGISel::SelectBasicBlock(BasicBlock::const_iterator Begin,
@@ -785,6 +766,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
   StringRef GroupName = "sdag";
   StringRef GroupDescription = "Instruction Selection and Scheduling";
   std::string BlockName;
+  StringRef FuncName = MF->getName();
   bool MatchFilterBB = false; (void)MatchFilterBB;
 #ifndef NDEBUG
   TargetTransformInfo &TTI =
@@ -806,12 +788,13 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
 #endif
   {
     BlockName =
-        (MF->getName() + ":" + FuncInfo->MBB->getBasicBlock()->getName()).str();
+        (FuncName + ":" + FuncInfo->MBB->getBasicBlock()->getName()).str();
   }
-  ISEL_TRACE(dbgs() << "\nInitial selection DAG: "
-                    << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
-                    << "'\n";
-             CurDAG->dump());
+  ISEL_DUMP(FuncName, {
+    dbgs() << "\nInitial selection DAG: " << printMBBReference(*FuncInfo->MBB)
+           << " '" << BlockName << "'\n";
+    CurDAG->dump();
+  });
 
 #ifndef NDEBUG
   if (TTI.hasBranchDivergence())
@@ -828,10 +811,11 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     CurDAG->Combine(BeforeLegalizeTypes, AA, OptLevel);
   }
 
-  ISEL_TRACE(dbgs() << "\nOptimized lowered selection DAG: "
-                    << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
-                    << "'\n";
-             CurDAG->dump());
+  ISEL_DUMP(FuncName, {
+    dbgs() << "\nOptimized lowered selection DAG: "
+           << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
+    CurDAG->dump();
+  });
 
 #ifndef NDEBUG
   if (TTI.hasBranchDivergence())
@@ -850,10 +834,11 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     Changed = CurDAG->LegalizeTypes();
   }
 
-  ISEL_TRACE(dbgs() << "\nType-legalized selection DAG: "
-                    << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
-                    << "'\n";
-             CurDAG->dump());
+  ISEL_DUMP(FuncName, {
+    dbgs() << "\nType-legalized selection DAG: "
+           << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
+    CurDAG->dump();
+  });
 
 #ifndef NDEBUG
   if (TTI.hasBranchDivergence())
@@ -874,10 +859,11 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
       CurDAG->Combine(AfterLegalizeTypes, AA, OptLevel);
     }
 
-    ISEL_TRACE(dbgs() << "\nOptimized type-legalized selection DAG: "
-                      << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
-                      << "'\n";
-               CurDAG->dump());
+    ISEL_DUMP(FuncName, {
+      dbgs() << "\nOptimized type-legalized selection DAG: "
+             << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
+      CurDAG->dump();
+    });
 
 #ifndef NDEBUG
     if (TTI.hasBranchDivergence())
@@ -892,10 +878,11 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
   }
 
   if (Changed) {
-    ISEL_TRACE(dbgs() << "\nVector-legalized selection DAG: "
-                      << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
-                      << "'\n";
-               CurDAG->dump());
+    ISEL_DUMP(FuncName, {
+      dbgs() << "\nVector-legalized selection DAG: "
+             << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
+      CurDAG->dump();
+    });
 
 #ifndef NDEBUG
     if (TTI.hasBranchDivergence())
@@ -908,10 +895,11 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
       CurDAG->LegalizeTypes();
     }
 
-    ISEL_TRACE(dbgs() << "\nVector/type-legalized selection DAG: "
-                      << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
-                      << "'\n";
-               CurDAG->dump());
+    ISEL_DUMP(FuncName, {
+      dbgs() << "\nVector/type-legalized selection DAG: "
+             << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
+      CurDAG->dump();
+    });
 
 #ifndef NDEBUG
     if (TTI.hasBranchDivergence())
@@ -928,10 +916,11 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
       CurDAG->Combine(AfterLegalizeVectorOps, AA, OptLevel);
     }
 
-    ISEL_TRACE(dbgs() << "\nOptimized vector-legalized selection DAG: "
-                      << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
-                      << "'\n";
-               CurDAG->dump());
+    ISEL_DUMP(FuncName, {
+      dbgs() << "\nOptimized vector-legalized selection DAG: "
+             << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
+      CurDAG->dump();
+    });
 
 #ifndef NDEBUG
     if (TTI.hasBranchDivergence())
@@ -948,10 +937,11 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     CurDAG->Legalize();
   }
 
-  ISEL_TRACE(dbgs() << "\nLegalized selection DAG: "
-                    << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
-                    << "'\n";
-             CurDAG->dump());
+  ISEL_DUMP(FuncName, {
+    dbgs() << "\nLegalized selection DAG: " << printMBBReference(*FuncInfo->MBB)
+           << " '" << BlockName << "'\n";
+    CurDAG->dump();
+  });
 
 #ifndef NDEBUG
   if (TTI.hasBranchDivergence())
@@ -968,10 +958,11 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     CurDAG->Combine(AfterLegalizeDAG, AA, OptLevel);
   }
 
-  ISEL_TRACE(dbgs() << "\nOptimized legalized selection DAG: "
-                    << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
-                    << "'\n";
-             CurDAG->dump());
+  ISEL_DUMP(FuncName, {
+    dbgs() << "\nOptimized legalized selection DAG: "
+           << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
+    CurDAG->dump();
+  });
 
 #ifndef NDEBUG
   if (TTI.hasBranchDivergence())
@@ -992,10 +983,11 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     DoInstructionSelection();
   }
 
-  ISEL_TRACE(dbgs() << "\nSelected selection DAG: "
-                    << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
-                    << "'\n";
-             CurDAG->dump());
+  ISEL_DUMP(FuncName, {
+    dbgs() << "\nSelected selection DAG: " << printMBBReference(*FuncInfo->MBB)
+           << " '" << BlockName << "'\n";
+    CurDAG->dump();
+  });
 
   if (ViewSchedDAGs && MatchFilterBB)
     CurDAG->viewGraph("scheduler input for " + BlockName);
@@ -1123,7 +1115,7 @@ int SelectionDAGISel::getUninvalidatedNodeId(SDNode *N) {
 }
 
 void SelectionDAGISel::DoInstructionSelection() {
-  ISEL_TRACE(dbgs() << "===== Instruction selection begins: "
+  LLVM_DEBUG(dbgs() << "===== Instruction selection begins: "
                     << printMBBReference(*FuncInfo->MBB) << " '"
                     << FuncInfo->MBB->getName() << "'\n");
 
@@ -1215,7 +1207,7 @@ void SelectionDAGISel::DoInstructionSelection() {
           Node = CurDAG->mutateStrictFPToFP(Node);
       }
 
-      ISEL_TRACE(dbgs() << "\nISEL: Starting selection on root node: ";
+      LLVM_DEBUG(dbgs() << "\nISEL: Starting selection on root node: ";
                  Node->dump(CurDAG));
 
       Select(Node);
@@ -1224,7 +1216,7 @@ void SelectionDAGISel::DoInstructionSelection() {
     CurDAG->setRoot(Dummy.getValue());
   }
 
-  ISEL_TRACE(dbgs() << "\n===== Instruction selection ends:\n");
+  LLVM_DEBUG(dbgs() << "\n===== Instruction selection ends:\n");
 
   PostprocessISelDAG();
 }
@@ -1403,7 +1395,7 @@ static bool processIfEntryValueDbgDeclare(FunctionLoweringInfo &FuncInfo,
       // Append an op deref to account for the fact that this is a dbg_declare.
       Expr = DIExpression::append(Expr, dwarf::DW_OP_deref);
       FuncInfo.MF->setVariableDbgInfo(Var, Expr, PhysReg, DbgLoc);
-      ISEL_TRACE(dbgs() << "processDbgDeclare: setVariableDbgInfo Var=" << *Var
+      LLVM_DEBUG(dbgs() << "processDbgDeclare: setVariableDbgInfo Var=" << *Var
                         << ", Expr=" << *Expr << ",  MCRegister=" << PhysReg
                         << ", DbgLoc=" << DbgLoc << "\n");
       return true;
@@ -1415,7 +1407,7 @@ static bool processDbgDeclare(FunctionLoweringInfo &FuncInfo,
                               const Value *Address, DIExpression *Expr,
                               DILocalVariable *Var, DebugLoc DbgLoc) {
   if (!Address) {
-    ISEL_TRACE(dbgs() << "processDbgDeclares skipping " << *Var
+    LLVM_DEBUG(dbgs() << "processDbgDeclares skipping " << *Var
                       << " (bad address)\n");
     return false;
   }
@@ -1452,7 +1444,7 @@ static bool processDbgDeclare(FunctionLoweringInfo &FuncInfo,
     Expr = DIExpression::prepend(Expr, DIExpression::ApplyOffset,
                                  Offset.getZExtValue());
 
-  ISEL_TRACE(dbgs() << "processDbgDeclare: setVariableDbgInfo Var=" << *Var
+  LLVM_DEBUG(dbgs() << "processDbgDeclare: setVariableDbgInfo Var=" << *Var
                     << ", Expr=" << *Expr << ",  FI=" << FI
                     << ", DbgLoc=" << DbgLoc << "\n");
   MF->setVariableDbgInfo(Var, Expr, FI, DbgLoc);
@@ -1489,7 +1481,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
   // Initialize the Fast-ISel state, if needed.
   FastISel *FastIS = nullptr;
   if (TM.Options.EnableFastISel) {
-    ISEL_TRACE(dbgs() << "Enabling fast-isel\n");
+    LLVM_DEBUG(dbgs() << "Enabling fast-isel\n");
     FastIS = TLI->createFastISel(*FuncInfo, LibInfo);
   }
 
@@ -1636,7 +1628,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
               BeforeInst->hasOneUse() &&
               FastIS->tryToFoldLoad(cast<LoadInst>(BeforeInst), Inst)) {
             // If we succeeded, don't re-select the load.
-            ISEL_TRACE(dbgs()
+            LLVM_DEBUG(dbgs()
                        << "FastISel folded load: " << *BeforeInst << "\n");
             BI = std::next(BasicBlock::const_iterator(BeforeInst));
             --NumFastIselRemaining;
@@ -1773,7 +1765,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
 
 void
 SelectionDAGISel::FinishBasicBlock() {
-  ISEL_TRACE(dbgs() << "Total amount of phi nodes to update: "
+  LLVM_DEBUG(dbgs() << "Total amount of phi nodes to update: "
                     << FuncInfo->PHINodesToUpdate.size() << "\n";
              for (unsigned i = 0, e = FuncInfo->PHINodesToUpdate.size(); i != e;
                   ++i) dbgs()
@@ -2542,7 +2534,7 @@ void SelectionDAGISel::UpdateChains(
   if (!NowDeadNodes.empty())
     CurDAG->RemoveDeadNodes(NowDeadNodes);
 
-  ISEL_TRACE(dbgs() << "ISEL: Match complete!\n");
+  LLVM_DEBUG(dbgs() << "ISEL: Match complete!\n");
 }
 
 /// HandleMergeInputChains - This implements the OPC_EmitMergeInputChains
@@ -3079,7 +3071,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
   // update the chain results when the pattern is complete.
   SmallVector<SDNode*, 3> ChainNodesMatched;
 
-  ISEL_TRACE(dbgs() << "ISEL: Starting pattern match\n");
+  LLVM_DEBUG(dbgs() << "ISEL: Starting pattern match\n");
 
   // Determine where to start the interpreter.  Normally we start at opcode #0,
   // but if the state machine starts with an OPC_SwitchOpcode, then we
@@ -3091,7 +3083,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
     // Already computed the OpcodeOffset table, just index into it.
     if (N.getOpcode() < OpcodeOffset.size())
       MatcherIndex = OpcodeOffset[N.getOpcode()];
-    ISEL_TRACE(dbgs() << "  Initial Opcode index to " << MatcherIndex << "\n");
+    LLVM_DEBUG(dbgs() << "  Initial Opcode index to " << MatcherIndex << "\n");
 
   } else if (MatcherTable[0] == OPC_SwitchOpcode) {
     // Otherwise, the table isn't computed, but the state machine does start
@@ -3158,7 +3150,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
         if (!Result)
           break;
 
-        ISEL_TRACE(
+        LLVM_DEBUG(
             dbgs() << "  Skipped scope entry (due to false predicate) at "
                    << "index " << MatcherIndexOfPredicate << ", continuing at "
                    << FailIndex << "\n");
@@ -3210,7 +3202,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
       if (auto *MN = dyn_cast<MemSDNode>(N))
         MatchedMemRefs.push_back(MN->getMemOperand());
       else {
-        ISEL_TRACE(dbgs() << "Expected MemSDNode "; N->dump(CurDAG);
+        LLVM_DEBUG(dbgs() << "Expected MemSDNode "; N->dump(CurDAG);
                    dbgs() << '\n');
       }
 
@@ -3347,7 +3339,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
       if (CaseSize == 0) break;
 
       // Otherwise, execute the case we found.
-      ISEL_TRACE(dbgs() << "  OpcodeSwitch from " << SwitchStart << " to "
+      LLVM_DEBUG(dbgs() << "  OpcodeSwitch from " << SwitchStart << " to "
                         << MatcherIndex << "\n");
       continue;
     }
@@ -3379,8 +3371,9 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
       if (CaseSize == 0) break;
 
       // Otherwise, execute the case we found.
-      ISEL_TRACE(dbgs() << "  TypeSwitch[" << CurNodeVT << "] from "
-                        << SwitchStart << " to " << MatcherIndex << '\n');
+      LLVM_DEBUG(dbgs() << "  TypeSwitch[" << CurNodeVT
+                        << "] from " << SwitchStart << " to " << MatcherIndex
+                        << '\n');
       continue;
     }
     case OPC_CheckChild0Type: case OPC_CheckChild1Type:
@@ -3788,7 +3781,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
         CurDAG->setNodeMemRefs(Res, FilteredMemRefs);
       }
 
-      ISEL_TRACE(if (!MatchedMemRefs.empty() && Res->memoperands_empty()) dbgs()
+      LLVM_DEBUG(if (!MatchedMemRefs.empty() && Res->memoperands_empty()) dbgs()
                      << "  Dropping mem operands\n";
                  dbgs() << "  " << (IsMorphNodeTo ? "Morphed" : "Created")
                         << " node: ";
@@ -3854,7 +3847,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
     // If the code reached this point, then the match failed.  See if there is
     // another child to try in the current 'Scope', otherwise pop it until we
     // find a case to check.
-    ISEL_TRACE(dbgs() << "  Match failed at index " << CurrentOpcodeIndex
+    LLVM_DEBUG(dbgs() << "  Match failed at index " << CurrentOpcodeIndex
                       << "\n");
     ++NumDAGIselRetries;
     while (true) {
@@ -3875,7 +3868,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
         MatchedMemRefs.resize(LastScope.NumMatchedMemRefs);
       MatcherIndex = LastScope.FailIndex;
 
-      ISEL_TRACE(dbgs() << "  Continuing at " << MatcherIndex << "\n");
+      LLVM_DEBUG(dbgs() << "  Continuing at " << MatcherIndex << "\n");
 
       InputChain = LastScope.InputChain;
       InputGlue = LastScope.InputGlue;
diff --git a/llvm/test/CodeGen/Generic/selectiondag-dump-filter.ll b/llvm/test/CodeGen/Generic/selectiondag-dump-filter.ll
index e320eb6ad13d77d..fb621610ccc4f60 100644
--- a/llvm/test/CodeGen/Generic/selectiondag-dump-filter.ll
+++ b/llvm/test/CodeGen/Generic/selectiondag-dump-filter.ll
@@ -1,10 +1,13 @@
-; RUN: llc -debug-only=isel -filter-print-dags-funcs=foo < %s 2>&1 | FileCheck %s --check-prefix=FOO
-; RUN: llc -debug-only=isel -filter-print-dags-funcs=bar < %s 2>&1 | FileCheck %s --check-prefix=BAR
-; RUN: llc -debug-only=isel -filter-print-dags-funcs=foo,zap < %s 2>&1 | FileCheck %s --check-prefixes=FOO,ZAP
+; RUN: llc -debug-only=isel-dump -filter-print-funcs=foo < %s 2>&1 | FileCheck %s --check-prefix=FOO
+; RUN: llc -debug-only=isel-dump -filter-print-funcs=bar < %s 2>&1 | FileCheck %s --check-prefix=BAR
+; RUN: llc -debug-only=isel-dump -filter-print-funcs=foo,zap < %s 2>&1 | FileCheck %s --check-prefixes=FOO,ZAP
+; Make sure the original -debug-only=isel still works.
+; RUN: llc -debug-only=isel < %s 2>&1 | FileCheck %s  --check-prefixes=FOO,BAR,ZAP
 ; REQUIRES: asserts
 
 ; FOO:     === foo
 ; BAR-NOT: === foo
+; ZAP-NOT: === foo
 ; FOO: # Machine code for function foo
 define i32 @foo(i32 %a, i32 %b) {
   %r = add i32 %a, %b
@@ -13,6 +16,7 @@ define i32 @foo(i32 %a, i32 %b) {
 
 ; BAR:     === bar
 ; FOO-NOT: === bar
+; ZAP-NOT: === bar
 ; BAR: # Machine code for function bar
 define i32 @bar(i32 %a, i32 %b) {
   %r = mul i32 %a, %b
@@ -20,6 +24,7 @@ define i32 @bar(i32 %a, i32 %b) {
 }
 
 ; ZAP:     === zap
+; FOO-NOT: === zap
 ; BAR-NOT: === zap
 ; ZAP: # Machine code for function zap
 define i32 @zap(i32 %a, i32 %b) {

>From fc668f08e9781f662c6179e04e6f03f74c5059d0 Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Mon, 20 Nov 2023 09:47:00 -0800
Subject: [PATCH 4/8] Address code reivew feedbacks

  - Store function filtering result as a class member variable instead
  of recalculate in each ISEL_DUMP.
  - Add this feature into the release note.
---
 llvm/docs/ReleaseNotes.rst                    |   8 ++
 llvm/include/llvm/CodeGen/SelectionDAGISel.h  |   4 +
 .../CodeGen/SelectionDAG/SelectionDAGISel.cpp | 115 +++++++++---------
 3 files changed, 67 insertions(+), 60 deletions(-)

diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index eccac66588072f1..5752c09a41ba689 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -201,6 +201,14 @@ Changes to the C API
 Changes to the CodeGen infrastructure
 -------------------------------------
 
+* A new debug type ``isel-dump`` is added to show only the SelectionDAG dumps
+  after each ISel phase (i.e. ``-debug-onlu=isel-dump``). This new debug type
+  can be filtered by function names using ``-filter-print-funcs=<function names>``,
+  the same flag used to filter IR dumps after each Pass. Note that to be
+  compatible with the existing ``-debug-only=isel``, the latter will still
+  print SelectionDAG dumps of every single functions regardless of
+  ``-filter-print-funcs``'s values.
+
 * ``PrologEpilogInserter`` no longer supports register scavenging
   during forwards frame index elimination. Targets should use
   backwards frame index elimination instead.
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGISel.h b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
index 884fdfadfcbef74..0a37c898e8a1ad7 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGISel.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
@@ -61,6 +61,10 @@ class SelectionDAGISel : public MachineFunctionPass {
   /// Used to report things like combines and FastISel failures.
   std::unique_ptr<OptimizationRemarkEmitter> ORE;
 
+  /// True if the function currently processing is in the function printing list
+  /// (i.e. `-filter-print-funcs`).
+  bool MatchFilterFuncName = false;
+
   explicit SelectionDAGISel(char &ID, TargetMachine &tm,
                             CodeGenOptLevel OL = CodeGenOptLevel::Default);
   ~SelectionDAGISel() override;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 990b472ed22c9f4..ede1aceaa05a96d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -182,11 +182,11 @@ static const bool ViewDAGCombine1 = false, ViewLegalizeTypesDAGs = false,
                   ViewSchedDAGs = false, ViewSUnitDAGs = false;
 #endif
 
-#define ISEL_DUMP(F, X)                                                        \
+#define ISEL_DUMP(X)                                                           \
   do {                                                                         \
-    if (llvm::DebugFlag && (isCurrentDebugType(DEBUG_TYPE) ||                  \
-                            (isCurrentDebugType(ISEL_DUMP_DEBUG_TYPE) &&       \
-                             isFunctionInPrintList(F)))) {                     \
+    if (llvm::DebugFlag &&                                                     \
+        (isCurrentDebugType(DEBUG_TYPE) ||                                     \
+         (isCurrentDebugType(ISEL_DUMP_DEBUG_TYPE) && MatchFilterFuncName))) {     \
       X;                                                                       \
     }                                                                          \
   } while (false)
@@ -412,9 +412,15 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
          "-fast-isel-abort > 0 requires -fast-isel");
 
   const Function &Fn = mf.getFunction();
-  StringRef FuncName = Fn.getName();
   MF = &mf;
 
+#ifndef NDEBUG
+  StringRef FuncName = Fn.getName();
+  MatchFilterFuncName = isFunctionInPrintList(FuncName);
+#else
+  (void)MatchFilterFuncName;
+#endif
+
   // Decide what flavour of variable location debug-info will be used, before
   // we change the optimisation level.
   bool InstrRef = mf.shouldUseDebugInstrRef();
@@ -448,7 +454,7 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
   if (isAssignmentTrackingEnabled(*Fn.getParent()))
     FnVarLocs = getAnalysis<AssignmentTrackingAnalysis>().getResults();
 
-  ISEL_DUMP(FuncName, dbgs() << "\n\n\n=== " << FuncName << "\n");
+  ISEL_DUMP(dbgs() << "\n\n\n=== " << FuncName << "\n");
 
   UniformityInfo *UA = nullptr;
   if (auto *UAPass = getAnalysisIfAvailable<UniformityInfoWrapperPass>())
@@ -680,8 +686,8 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
   // at this point.
   FuncInfo->clear();
 
-  ISEL_DUMP(FuncName, dbgs() << "*** MachineFunction at end of ISel ***\n");
-  ISEL_DUMP(FuncName, MF->print(dbgs()));
+  ISEL_DUMP(dbgs() << "*** MachineFunction at end of ISel ***\n");
+  ISEL_DUMP(MF->print(dbgs()));
 
   return true;
 }
@@ -766,7 +772,6 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
   StringRef GroupName = "sdag";
   StringRef GroupDescription = "Instruction Selection and Scheduling";
   std::string BlockName;
-  StringRef FuncName = MF->getName();
   bool MatchFilterBB = false; (void)MatchFilterBB;
 #ifndef NDEBUG
   TargetTransformInfo &TTI =
@@ -788,13 +793,12 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
 #endif
   {
     BlockName =
-        (FuncName + ":" + FuncInfo->MBB->getBasicBlock()->getName()).str();
+        (MF->getName() + ":" + FuncInfo->MBB->getBasicBlock()->getName()).str();
   }
-  ISEL_DUMP(FuncName, {
-    dbgs() << "\nInitial selection DAG: " << printMBBReference(*FuncInfo->MBB)
-           << " '" << BlockName << "'\n";
-    CurDAG->dump();
-  });
+  ISEL_DUMP(dbgs() << "\nInitial selection DAG: "
+                   << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+                   << "'\n";
+            CurDAG->dump());
 
 #ifndef NDEBUG
   if (TTI.hasBranchDivergence())
@@ -811,11 +815,10 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     CurDAG->Combine(BeforeLegalizeTypes, AA, OptLevel);
   }
 
-  ISEL_DUMP(FuncName, {
-    dbgs() << "\nOptimized lowered selection DAG: "
-           << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
-    CurDAG->dump();
-  });
+  ISEL_DUMP(dbgs() << "\nOptimized lowered selection DAG: "
+                   << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+                   << "'\n";
+            CurDAG->dump());
 
 #ifndef NDEBUG
   if (TTI.hasBranchDivergence())
@@ -834,11 +837,10 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     Changed = CurDAG->LegalizeTypes();
   }
 
-  ISEL_DUMP(FuncName, {
-    dbgs() << "\nType-legalized selection DAG: "
-           << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
-    CurDAG->dump();
-  });
+  ISEL_DUMP(dbgs() << "\nType-legalized selection DAG: "
+                   << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+                   << "'\n";
+            CurDAG->dump());
 
 #ifndef NDEBUG
   if (TTI.hasBranchDivergence())
@@ -859,11 +861,10 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
       CurDAG->Combine(AfterLegalizeTypes, AA, OptLevel);
     }
 
-    ISEL_DUMP(FuncName, {
-      dbgs() << "\nOptimized type-legalized selection DAG: "
-             << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
-      CurDAG->dump();
-    });
+    ISEL_DUMP(dbgs() << "\nOptimized type-legalized selection DAG: "
+                     << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+                     << "'\n";
+              CurDAG->dump());
 
 #ifndef NDEBUG
     if (TTI.hasBranchDivergence())
@@ -878,11 +879,10 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
   }
 
   if (Changed) {
-    ISEL_DUMP(FuncName, {
-      dbgs() << "\nVector-legalized selection DAG: "
-             << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
-      CurDAG->dump();
-    });
+    ISEL_DUMP(dbgs() << "\nVector-legalized selection DAG: "
+                     << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+                     << "'\n";
+              CurDAG->dump());
 
 #ifndef NDEBUG
     if (TTI.hasBranchDivergence())
@@ -895,11 +895,10 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
       CurDAG->LegalizeTypes();
     }
 
-    ISEL_DUMP(FuncName, {
-      dbgs() << "\nVector/type-legalized selection DAG: "
-             << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
-      CurDAG->dump();
-    });
+    ISEL_DUMP(dbgs() << "\nVector/type-legalized selection DAG: "
+                     << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+                     << "'\n";
+              CurDAG->dump());
 
 #ifndef NDEBUG
     if (TTI.hasBranchDivergence())
@@ -916,11 +915,10 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
       CurDAG->Combine(AfterLegalizeVectorOps, AA, OptLevel);
     }
 
-    ISEL_DUMP(FuncName, {
-      dbgs() << "\nOptimized vector-legalized selection DAG: "
-             << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
-      CurDAG->dump();
-    });
+    ISEL_DUMP(dbgs() << "\nOptimized vector-legalized selection DAG: "
+                     << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+                     << "'\n";
+              CurDAG->dump());
 
 #ifndef NDEBUG
     if (TTI.hasBranchDivergence())
@@ -937,11 +935,10 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     CurDAG->Legalize();
   }
 
-  ISEL_DUMP(FuncName, {
-    dbgs() << "\nLegalized selection DAG: " << printMBBReference(*FuncInfo->MBB)
-           << " '" << BlockName << "'\n";
-    CurDAG->dump();
-  });
+  ISEL_DUMP(dbgs() << "\nLegalized selection DAG: "
+                   << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+                   << "'\n";
+            CurDAG->dump());
 
 #ifndef NDEBUG
   if (TTI.hasBranchDivergence())
@@ -958,11 +955,10 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     CurDAG->Combine(AfterLegalizeDAG, AA, OptLevel);
   }
 
-  ISEL_DUMP(FuncName, {
-    dbgs() << "\nOptimized legalized selection DAG: "
-           << printMBBReference(*FuncInfo->MBB) << " '" << BlockName << "'\n";
-    CurDAG->dump();
-  });
+  ISEL_DUMP(dbgs() << "\nOptimized legalized selection DAG: "
+                   << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+                   << "'\n";
+            CurDAG->dump());
 
 #ifndef NDEBUG
   if (TTI.hasBranchDivergence())
@@ -983,11 +979,10 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
     DoInstructionSelection();
   }
 
-  ISEL_DUMP(FuncName, {
-    dbgs() << "\nSelected selection DAG: " << printMBBReference(*FuncInfo->MBB)
-           << " '" << BlockName << "'\n";
-    CurDAG->dump();
-  });
+  ISEL_DUMP(dbgs() << "\nSelected selection DAG: "
+                   << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+                   << "'\n";
+            CurDAG->dump());
 
   if (ViewSchedDAGs && MatchFilterBB)
     CurDAG->viewGraph("scheduler input for " + BlockName);

>From 3ddd530a2f701ffe897c6c38eb578a856a1327c5 Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Mon, 20 Nov 2023 10:01:56 -0800
Subject: [PATCH 5/8] fixup! Address code reivew feedbacks

---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index ede1aceaa05a96d..5b0e7206d5dace8 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -186,7 +186,7 @@ static const bool ViewDAGCombine1 = false, ViewLegalizeTypesDAGs = false,
   do {                                                                         \
     if (llvm::DebugFlag &&                                                     \
         (isCurrentDebugType(DEBUG_TYPE) ||                                     \
-         (isCurrentDebugType(ISEL_DUMP_DEBUG_TYPE) && MatchFilterFuncName))) {     \
+         (isCurrentDebugType(ISEL_DUMP_DEBUG_TYPE) && MatchFilterFuncName))) { \
       X;                                                                       \
     }                                                                          \
   } while (false)

>From de065ee0b00c9397dfe9a4ce4efc2f012c879b7f Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Mon, 20 Nov 2023 13:11:17 -0800
Subject: [PATCH 6/8] Minor fixes in documentation and release notes

---
 llvm/docs/ReleaseNotes.rst                   | 8 ++++----
 llvm/include/llvm/CodeGen/SelectionDAGISel.h | 3 +++
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 5752c09a41ba689..5804a67e9eb4a47 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -202,11 +202,11 @@ Changes to the CodeGen infrastructure
 -------------------------------------
 
 * A new debug type ``isel-dump`` is added to show only the SelectionDAG dumps
-  after each ISel phase (i.e. ``-debug-onlu=isel-dump``). This new debug type
+  after each ISel phase (i.e. ``-debug-only=isel-dump``). This new debug type
   can be filtered by function names using ``-filter-print-funcs=<function names>``,
-  the same flag used to filter IR dumps after each Pass. Note that to be
-  compatible with the existing ``-debug-only=isel``, the latter will still
-  print SelectionDAG dumps of every single functions regardless of
+  the same flag used to filter IR dumps after each Pass. Note that the existing
+  ``-debug-only=isel`` will take precedence over the new behavior and
+  print SelectionDAG dumps of every single function regardless of
   ``-filter-print-funcs``'s values.
 
 * ``PrologEpilogInserter`` no longer supports register scavenging
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGISel.h b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
index 0a37c898e8a1ad7..ffeb4959ba7d076 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGISel.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
@@ -63,6 +63,9 @@ class SelectionDAGISel : public MachineFunctionPass {
 
   /// True if the function currently processing is in the function printing list
   /// (i.e. `-filter-print-funcs`).
+  /// This is primarily used by ISEL_DUMP, which spans in multiple member
+  /// functions. Storing the filter result here so that we only need to do the
+  /// filtering once.
   bool MatchFilterFuncName = false;
 
   explicit SelectionDAGISel(char &ID, TargetMachine &tm,

>From 2d68cfe2c46eb60baa1a7ba7dcf44eeb0943017f Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Mon, 20 Nov 2023 13:22:36 -0800
Subject: [PATCH 7/8] Add documentions into docs/CodeGenerator.rst

---
 llvm/docs/CodeGenerator.rst | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/llvm/docs/CodeGenerator.rst b/llvm/docs/CodeGenerator.rst
index 5fb66c78b3f504b..70e4b7eef9599af 100644
--- a/llvm/docs/CodeGenerator.rst
+++ b/llvm/docs/CodeGenerator.rst
@@ -857,6 +857,12 @@ SelectionDAG-based instruction selection consists of the following steps:
 After all of these steps are complete, the SelectionDAG is destroyed and the
 rest of the code generation passes are run.
 
+One of the most common ways to debug these steps is using ``-debug-only=isel``,
+which prints out the DAG, along with other information like debug info,
+after each of these steps. Alternatively, ``-debug-only=isel-dump`` shows only
+the DAG dumps, but the results can be filtered by function names using
+``-filter-print-funcs=<function names>``.
+
 One great way to visualize what is going on here is to take advantage of a few
 LLC command line options.  The following options pop up a window displaying the
 SelectionDAG at specific times (if you only get errors printed to the console

>From e457df3375c131f61c6b3a9c0c88ad2f64fd544d Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Mon, 20 Nov 2023 13:29:12 -0800
Subject: [PATCH 8/8] fixup! Address code reivew feedbacks

---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 5b0e7206d5dace8..c5caff7c50a4bb0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -182,6 +182,7 @@ static const bool ViewDAGCombine1 = false, ViewLegalizeTypesDAGs = false,
                   ViewSchedDAGs = false, ViewSUnitDAGs = false;
 #endif
 
+#ifndef NDEBUG
 #define ISEL_DUMP(X)                                                           \
   do {                                                                         \
     if (llvm::DebugFlag &&                                                     \
@@ -190,6 +191,11 @@ static const bool ViewDAGCombine1 = false, ViewLegalizeTypesDAGs = false,
       X;                                                                       \
     }                                                                          \
   } while (false)
+#else
+#define ISEL_DUMP(X)                                                           \
+  do {                                                                         \
+  } while (false)
+#endif
 
 //===---------------------------------------------------------------------===//
 ///



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