[llvm] [AMDGPU][NFC] Update GISel memory-legalizer-atomic-fence test (PR #72829)
Pierre van Houtryve via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 19 23:57:17 PST 2023
https://github.com/Pierre-vh created https://github.com/llvm/llvm-project/pull/72829
Test needs to be moved to MIR checks and use stop-after=si-memory-legalizer to avoid being optimized out in a future patch.
>From 1ef3f6cc9c59e55d7a80e5e07556fc26bec51124 Mon Sep 17 00:00:00 2001
From: pvanhout <pierre.vanhoutryve at amd.com>
Date: Mon, 20 Nov 2023 08:43:27 +0100
Subject: [PATCH] [AMDGPU][NFC] Update GISel memory-legalizer-atomic-fence test
Test needs to be moved to MIR checks and use stop-after=si-memory-legalizer to avoid being optimized out in a future patch.
---
.../memory-legalizer-atomic-fence.ll | 1754 ++++++++++++-----
1 file changed, 1272 insertions(+), 482 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
index 0fbfe4cb6f35f13..601cc791c04141a 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
@@ -1,720 +1,1510 @@
-; RUN: llc -global-isel -mtriple=amdgcn-amd- -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,GFX6,GFX68 %s
-; RUN: llc -global-isel -mtriple=amdgcn-amd- -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,GFX8,GFX68 %s
-; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,GFX8,GFX68 %s
-; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,GFX10,GFX10WGP %s
-; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+cumode -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,GFX10,GFX10CU %s
-; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,GFX10,GFX10WGP %s
-; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+cumode -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,GFX10,GFX10CU %s
-
-; FUNC-LABEL: {{^}}system_one_as_acquire:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GFX6: s_waitcnt vmcnt(0){{$}}
-; GFX6-NEXT: buffer_wbinvl1{{$}}
-; GFX8: s_waitcnt vmcnt(0){{$}}
-; GFX8-NEXT: buffer_wbinvl1_vol{{$}}
-; GFX10: s_waitcnt vmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel system_one_as_acquire
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -global-isel -stop-after=si-memory-legalizer -mtriple=amdgcn-amd- -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX6 %s
+; RUN: llc -global-isel -stop-after=si-memory-legalizer -mtriple=amdgcn-amd- -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX8 %s
+; RUN: llc -global-isel -stop-after=si-memory-legalizer -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX8 %s
+; RUN: llc -global-isel -stop-after=si-memory-legalizer -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10WGP %s
+; RUN: llc -global-isel -stop-after=si-memory-legalizer -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+cumode -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10CU %s
+; RUN: llc -global-isel -stop-after=si-memory-legalizer -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX11WGP %s
+; RUN: llc -global-isel -stop-after=si-memory-legalizer -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+cumode -verify-machineinstrs < %s | FileCheck -check-prefix=GFX11CU %s
+
+; Note: we use MIR test checks + stop after legalizer to prevent
+; tests from being optimized out.
+
define amdgpu_kernel void @system_one_as_acquire() {
+ ; GFX6-LABEL: name: system_one_as_acquire
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 3952
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: system_one_as_acquire
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 3952
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: system_one_as_acquire
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: system_one_as_acquire
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 16240
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: system_one_as_acquire
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: system_one_as_acquire
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 1015
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("one-as") acquire
ret void
}
-; FUNC-LABEL: {{^}}system_one_as_release:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_waitcnt vmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel system_one_as_release
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @system_one_as_release() {
+ ; GFX6-LABEL: name: system_one_as_release
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 3952
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: system_one_as_release
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 3952
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: system_one_as_release
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: system_one_as_release
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 16240
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: system_one_as_release
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: system_one_as_release
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 1015
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("one-as") release
ret void
}
-; FUNC-LABEL: {{^}}system_one_as_acq_rel:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_waitcnt vmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX6: buffer_wbinvl1{{$}}
-; GFX8: buffer_wbinvl1_vol{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel system_one_as_acq_rel
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @system_one_as_acq_rel() {
+ ; GFX6-LABEL: name: system_one_as_acq_rel
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 3952
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: system_one_as_acq_rel
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 3952
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: system_one_as_acq_rel
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: system_one_as_acq_rel
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 16240
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: system_one_as_acq_rel
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: system_one_as_acq_rel
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 1015
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("one-as") acq_rel
ret void
}
-; FUNC-LABEL: {{^}}system_one_as_seq_cst:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_waitcnt vmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX6: buffer_wbinvl1{{$}}
-; GFX8: buffer_wbinvl1_vol{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel system_one_as_seq_cst
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @system_one_as_seq_cst() {
+ ; GFX6-LABEL: name: system_one_as_seq_cst
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 3952
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: system_one_as_seq_cst
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 3952
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: system_one_as_seq_cst
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: system_one_as_seq_cst
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 16240
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: system_one_as_seq_cst
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: system_one_as_seq_cst
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 1015
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("one-as") seq_cst
ret void
}
-; FUNC-LABEL: {{^}}singlethread_one_as_acquire:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel singlethread_one_as_acquire
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @singlethread_one_as_acquire() {
+ ; GFX6-LABEL: name: singlethread_one_as_acquire
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: singlethread_one_as_acquire
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: singlethread_one_as_acquire
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: singlethread_one_as_acquire
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: singlethread_one_as_acquire
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: singlethread_one_as_acquire
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("singlethread-one-as") acquire
ret void
}
-; FUNC-LABEL: {{^}}singlethread_one_as_release:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel singlethread_one_as_release
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @singlethread_one_as_release() {
+ ; GFX6-LABEL: name: singlethread_one_as_release
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: singlethread_one_as_release
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: singlethread_one_as_release
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: singlethread_one_as_release
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: singlethread_one_as_release
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: singlethread_one_as_release
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("singlethread-one-as") release
ret void
}
-; FUNC-LABEL: {{^}}singlethread_one_as_acq_rel:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel singlethread_one_as_acq_rel
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @singlethread_one_as_acq_rel() {
+ ; GFX6-LABEL: name: singlethread_one_as_acq_rel
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: singlethread_one_as_acq_rel
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: singlethread_one_as_acq_rel
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: singlethread_one_as_acq_rel
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: singlethread_one_as_acq_rel
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: singlethread_one_as_acq_rel
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("singlethread-one-as") acq_rel
ret void
}
-; FUNC-LABEL: {{^}}singlethread_one_as_seq_cst:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel singlethread_one_as_seq_cst
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @singlethread_one_as_seq_cst() {
+ ; GFX6-LABEL: name: singlethread_one_as_seq_cst
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: singlethread_one_as_seq_cst
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: singlethread_one_as_seq_cst
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: singlethread_one_as_seq_cst
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: singlethread_one_as_seq_cst
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: singlethread_one_as_seq_cst
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("singlethread-one-as") seq_cst
ret void
}
-; FUNC-LABEL: {{^}}agent_one_as_acquire:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GFX6: s_waitcnt vmcnt(0){{$}}
-; GFX6-NEXT: buffer_wbinvl1{{$}}
-; GFX8: s_waitcnt vmcnt(0){{$}}
-; GFX8-NEXT: buffer_wbinvl1_vol{{$}}
-; GFX10: s_waitcnt vmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel agent_one_as_acquire
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @agent_one_as_acquire() {
+ ; GFX6-LABEL: name: agent_one_as_acquire
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 3952
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: agent_one_as_acquire
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 3952
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: agent_one_as_acquire
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: agent_one_as_acquire
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 16240
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: agent_one_as_acquire
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: agent_one_as_acquire
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 1015
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("agent-one-as") acquire
ret void
}
-; FUNC-LABEL: {{^}}agent_one_as_release:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_waitcnt vmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel agent_one_as_release
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @agent_one_as_release() {
+ ; GFX6-LABEL: name: agent_one_as_release
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 3952
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: agent_one_as_release
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 3952
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: agent_one_as_release
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: agent_one_as_release
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 16240
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: agent_one_as_release
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: agent_one_as_release
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 1015
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("agent-one-as") release
ret void
}
-; FUNC-LABEL: {{^}}agent_one_as_acq_rel:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_waitcnt vmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX6: buffer_wbinvl1{{$}}
-; GFX8: buffer_wbinvl1_vol{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel agent_one_as_acq_rel
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @agent_one_as_acq_rel() {
+ ; GFX6-LABEL: name: agent_one_as_acq_rel
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 3952
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: agent_one_as_acq_rel
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 3952
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: agent_one_as_acq_rel
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: agent_one_as_acq_rel
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 16240
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: agent_one_as_acq_rel
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: agent_one_as_acq_rel
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 1015
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("agent-one-as") acq_rel
ret void
}
-; FUNC-LABEL: {{^}}agent_one_as_seq_cst:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_waitcnt vmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX6: buffer_wbinvl1{{$}}
-; GFX8: buffer_wbinvl1_vol{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel agent_one_as_seq_cst
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @agent_one_as_seq_cst() {
+ ; GFX6-LABEL: name: agent_one_as_seq_cst
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 3952
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: agent_one_as_seq_cst
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 3952
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: agent_one_as_seq_cst
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: agent_one_as_seq_cst
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 16240
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: agent_one_as_seq_cst
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: agent_one_as_seq_cst
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 1015
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("agent-one-as") seq_cst
ret void
}
-; FUNC-LABEL: {{^}}workgroup_one_as_acquire:
-; GCN: %bb.0
-; GFX68-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10CU-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10CU-NOT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10WGP-NEXT: buffer_gl0_inv{{$}}
-; GFX10CU-NOT: buffer_gl0_inv{{$}}
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel workgroup_one_as_acquire
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @workgroup_one_as_acquire() {
+ ; GFX6-LABEL: name: workgroup_one_as_acquire
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: workgroup_one_as_acquire
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: workgroup_one_as_acquire
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: workgroup_one_as_acquire
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: workgroup_one_as_acquire
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: workgroup_one_as_acquire
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("workgroup-one-as") acquire
ret void
}
-; FUNC-LABEL: {{^}}workgroup_one_as_release:
-; GCN: %bb.0
-; GFX68-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10CU-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10CU-NOT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10-NOT: buffer_gl0_inv
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel workgroup_one_as_release
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @workgroup_one_as_release() {
+ ; GFX6-LABEL: name: workgroup_one_as_release
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: workgroup_one_as_release
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: workgroup_one_as_release
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: workgroup_one_as_release
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: workgroup_one_as_release
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: workgroup_one_as_release
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("workgroup-one-as") release
ret void
}
-; FUNC-LABEL: {{^}}workgroup_one_as_acq_rel:
-; GCN: %bb.0
-; GFX68-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10WGP-NEXT: buffer_gl0_inv{{$}}
-; GFX10CU-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10CU-NOT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10CU-NOT: buffer_gl0_inv{{$}}
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel workgroup_one_as_acq_rel
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @workgroup_one_as_acq_rel() {
+ ; GFX6-LABEL: name: workgroup_one_as_acq_rel
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: workgroup_one_as_acq_rel
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: workgroup_one_as_acq_rel
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: workgroup_one_as_acq_rel
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: workgroup_one_as_acq_rel
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: workgroup_one_as_acq_rel
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("workgroup-one-as") acq_rel
ret void
}
-; FUNC-LABEL: {{^}}workgroup_one_as_seq_cst:
-; GCN: %bb.0
-; GFX68-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10WGP-NEXT: buffer_gl0_inv{{$}}
-; GFX10CU-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10CU-NOT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10CU-NOT: buffer_gl0_inv{{$}}
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel workgroup_one_as_seq_cst
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @workgroup_one_as_seq_cst() {
+ ; GFX6-LABEL: name: workgroup_one_as_seq_cst
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: workgroup_one_as_seq_cst
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: workgroup_one_as_seq_cst
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 16240
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: workgroup_one_as_seq_cst
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: workgroup_one_as_seq_cst
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 1015
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: workgroup_one_as_seq_cst
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("workgroup-one-as") seq_cst
ret void
}
-; FUNC-LABEL: {{^}}wavefront_one_as_acquire:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel wavefront_one_as_acquire
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @wavefront_one_as_acquire() {
+ ; GFX6-LABEL: name: wavefront_one_as_acquire
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: wavefront_one_as_acquire
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: wavefront_one_as_acquire
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: wavefront_one_as_acquire
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: wavefront_one_as_acquire
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: wavefront_one_as_acquire
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("wavefront-one-as") acquire
ret void
}
-; FUNC-LABEL: {{^}}wavefront_one_as_release:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel wavefront_one_as_release
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @wavefront_one_as_release() {
+ ; GFX6-LABEL: name: wavefront_one_as_release
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: wavefront_one_as_release
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: wavefront_one_as_release
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: wavefront_one_as_release
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: wavefront_one_as_release
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: wavefront_one_as_release
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("wavefront-one-as") release
ret void
}
-; FUNC-LABEL: {{^}}wavefront_one_as_acq_rel:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel wavefront_one_as_acq_rel
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @wavefront_one_as_acq_rel() {
+ ; GFX6-LABEL: name: wavefront_one_as_acq_rel
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: wavefront_one_as_acq_rel
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: wavefront_one_as_acq_rel
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: wavefront_one_as_acq_rel
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: wavefront_one_as_acq_rel
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: wavefront_one_as_acq_rel
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("wavefront-one-as") acq_rel
ret void
}
-; FUNC-LABEL: {{^}}wavefront_one_as_seq_cst:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel wavefront_one_as_seq_cst
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @wavefront_one_as_seq_cst() {
+ ; GFX6-LABEL: name: wavefront_one_as_seq_cst
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: wavefront_one_as_seq_cst
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: wavefront_one_as_seq_cst
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: wavefront_one_as_seq_cst
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: wavefront_one_as_seq_cst
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: wavefront_one_as_seq_cst
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("wavefront-one-as") seq_cst
ret void
}
-; FUNC-LABEL: {{^}}system_acquire:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GFX6: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX6-NEXT: buffer_wbinvl1{{$}}
-; GFX8: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX8-NEXT: buffer_wbinvl1_vol{{$}}
-; GFX10: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel system_acquire
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @system_acquire() {
+ ; GFX6-LABEL: name: system_acquire
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 112
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: system_acquire
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 112
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: system_acquire
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: system_acquire
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 112
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: system_acquire
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: system_acquire
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 7
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence acquire
ret void
}
-; FUNC-LABEL: {{^}}system_release:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GFX6: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX8: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel system_release
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @system_release() {
+ ; GFX6-LABEL: name: system_release
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 112
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: system_release
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 112
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: system_release
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: system_release
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 112
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: system_release
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: system_release
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 7
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence release
ret void
}
-; FUNC-LABEL: {{^}}system_acq_rel:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GFX6: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX8: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX6: buffer_wbinvl1{{$}}
-; GFX8: buffer_wbinvl1_vol{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel system_acq_rel
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @system_acq_rel() {
+ ; GFX6-LABEL: name: system_acq_rel
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 112
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: system_acq_rel
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 112
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: system_acq_rel
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: system_acq_rel
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 112
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: system_acq_rel
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: system_acq_rel
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 7
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence acq_rel
ret void
}
-; FUNC-LABEL: {{^}}system_seq_cst:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GFX6: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX8: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX6: buffer_wbinvl1{{$}}
-; GFX8: buffer_wbinvl1_vol{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel system_seq_cst
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @system_seq_cst() {
+ ; GFX6-LABEL: name: system_seq_cst
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 112
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: system_seq_cst
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 112
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: system_seq_cst
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: system_seq_cst
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 112
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: system_seq_cst
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: system_seq_cst
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 7
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence seq_cst
ret void
}
-; FUNC-LABEL: {{^}}singlethread_acquire:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel singlethread_acquire
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @singlethread_acquire() {
+ ; GFX6-LABEL: name: singlethread_acquire
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: singlethread_acquire
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: singlethread_acquire
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: singlethread_acquire
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: singlethread_acquire
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: singlethread_acquire
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("singlethread") acquire
ret void
}
-; FUNC-LABEL: {{^}}singlethread_release:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel singlethread_release
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @singlethread_release() {
+ ; GFX6-LABEL: name: singlethread_release
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: singlethread_release
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: singlethread_release
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: singlethread_release
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: singlethread_release
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: singlethread_release
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("singlethread") release
ret void
}
-; FUNC-LABEL: {{^}}singlethread_acq_rel:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel singlethread_acq_rel
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @singlethread_acq_rel() {
+ ; GFX6-LABEL: name: singlethread_acq_rel
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: singlethread_acq_rel
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: singlethread_acq_rel
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: singlethread_acq_rel
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: singlethread_acq_rel
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: singlethread_acq_rel
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("singlethread") acq_rel
ret void
}
-; FUNC-LABEL: {{^}}singlethread_seq_cst:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel singlethread_seq_cst
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @singlethread_seq_cst() {
+ ; GFX6-LABEL: name: singlethread_seq_cst
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: singlethread_seq_cst
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: singlethread_seq_cst
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: singlethread_seq_cst
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: singlethread_seq_cst
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: singlethread_seq_cst
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("singlethread") seq_cst
ret void
}
-; FUNC-LABEL: {{^}}agent_acquire:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GFX6: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX6-NEXT: buffer_wbinvl1{{$}}
-; GFX8: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX8-NEXT: buffer_wbinvl1_vol{{$}}
-; GFX10: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel agent_acquire
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @agent_acquire() {
+ ; GFX6-LABEL: name: agent_acquire
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 112
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: agent_acquire
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 112
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: agent_acquire
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: agent_acquire
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 112
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: agent_acquire
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: agent_acquire
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 7
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("agent") acquire
ret void
}
-; FUNC-LABEL: {{^}}agent_release:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GFX6: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX8: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel agent_release
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @agent_release() {
+ ; GFX6-LABEL: name: agent_release
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 112
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: agent_release
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 112
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: agent_release
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: agent_release
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 112
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: agent_release
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: agent_release
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 7
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("agent") release
ret void
}
-; FUNC-LABEL: {{^}}agent_acq_rel:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GFX6: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX8: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX6: buffer_wbinvl1{{$}}
-; GFX8: buffer_wbinvl1_vol{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel agent_acq_rel
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @agent_acq_rel() {
+ ; GFX6-LABEL: name: agent_acq_rel
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 112
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: agent_acq_rel
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 112
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: agent_acq_rel
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: agent_acq_rel
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 112
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: agent_acq_rel
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: agent_acq_rel
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 7
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("agent") acq_rel
ret void
}
-; FUNC-LABEL: {{^}}agent_seq_cst:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GFX6: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX8: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX6: buffer_wbinvl1{{$}}
-; GFX8: buffer_wbinvl1_vol{{$}}
-; GFX10-NEXT: buffer_gl0_inv{{$}}
-; GFX10-NEXT: buffer_gl1_inv{{$}}
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel agent_seq_cst
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @agent_seq_cst() {
+ ; GFX6-LABEL: name: agent_seq_cst
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 112
+ ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: agent_seq_cst
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 112
+ ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: agent_seq_cst
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: agent_seq_cst
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 112
+ ; GFX10CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: agent_seq_cst
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: agent_seq_cst
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 7
+ ; GFX11CU-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11CU-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("agent") seq_cst
ret void
}
-; FUNC-LABEL: {{^}}workgroup_acquire:
-; GCN: %bb.0
-; GFX68-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10WGP-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10CU-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10CU-NOT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10WGP-NEXT: buffer_gl0_inv{{$}}
-; GFX10CU-NOT: buffer_gl0_inv{{$}}
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel workgroup_acquire
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @workgroup_acquire() {
+ ; GFX6-LABEL: name: workgroup_acquire
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 127
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: workgroup_acquire
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 127
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: workgroup_acquire
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: workgroup_acquire
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 49279
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: workgroup_acquire
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: workgroup_acquire
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 64519
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("workgroup") acquire
ret void
}
-; FUNC-LABEL: {{^}}workgroup_release:
-; GCN: %bb.0
-; GFX68-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10WGP-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10CU-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10CU-NOT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10-NOT: buffer_gl0_inv
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel workgroup_release
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @workgroup_release() {
+ ; GFX6-LABEL: name: workgroup_release
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 127
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: workgroup_release
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 127
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: workgroup_release
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: workgroup_release
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 49279
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: workgroup_release
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: workgroup_release
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 64519
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("workgroup") release
ret void
}
-; FUNC-LABEL: {{^}}workgroup_acq_rel:
-; GCN: %bb.0
-; GFX68-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10WGP-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10WGP-NEXT: buffer_gl0_inv{{$}}
-; GFX10CU-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10CU-NOT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10CU-NOT: buffer_gl0_inv{{$}}
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel workgroup_acq_rel
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @workgroup_acq_rel() {
+ ; GFX6-LABEL: name: workgroup_acq_rel
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 127
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: workgroup_acq_rel
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 127
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: workgroup_acq_rel
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: workgroup_acq_rel
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 49279
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: workgroup_acq_rel
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: workgroup_acq_rel
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 64519
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("workgroup") acq_rel
ret void
}
-; FUNC-LABEL: {{^}}workgroup_seq_cst:
-; GCN: %bb.0
-; GFX68-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10WGP: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
-; GFX10WGP-NEXT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10WGP-NEXT: buffer_gl0_inv{{$}}
-; GFX10CU-NOT: s_waitcnt vmcnt(0){{$}}
-; GFX10CU-NOT: s_waitcnt_vscnt null, 0x0{{$}}
-; GFX10CU-NOT: buffer_gl0_inv{{$}}
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel workgroup_seq_cst
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @workgroup_seq_cst() {
+ ; GFX6-LABEL: name: workgroup_seq_cst
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_WAITCNT 127
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: workgroup_seq_cst
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_WAITCNT 127
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: workgroup_seq_cst
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_WAITCNT 112
+ ; GFX10WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: workgroup_seq_cst
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_WAITCNT 49279
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: workgroup_seq_cst
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_WAITCNT 7
+ ; GFX11WGP-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: workgroup_seq_cst
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_WAITCNT 64519
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("workgroup") seq_cst
ret void
}
-; FUNC-LABEL: {{^}}wavefront_acquire:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel wavefront_acquire
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @wavefront_acquire() {
+ ; GFX6-LABEL: name: wavefront_acquire
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: wavefront_acquire
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: wavefront_acquire
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: wavefront_acquire
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: wavefront_acquire
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: wavefront_acquire
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("wavefront") acquire
ret void
}
-; FUNC-LABEL: {{^}}wavefront_release:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel wavefront_release
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @wavefront_release() {
+ ; GFX6-LABEL: name: wavefront_release
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: wavefront_release
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: wavefront_release
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: wavefront_release
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: wavefront_release
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: wavefront_release
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("wavefront") release
ret void
}
-; FUNC-LABEL: {{^}}wavefront_acq_rel:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel wavefront_acq_rel
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @wavefront_acq_rel() {
+ ; GFX6-LABEL: name: wavefront_acq_rel
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: wavefront_acq_rel
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: wavefront_acq_rel
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: wavefront_acq_rel
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: wavefront_acq_rel
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: wavefront_acq_rel
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("wavefront") acq_rel
ret void
}
-; FUNC-LABEL: {{^}}wavefront_seq_cst:
-; GCN: %bb.0
-; GCN-NOT: ATOMIC_FENCE
-; GCN: s_endpgm
-; GFX10: .amdhsa_kernel wavefront_seq_cst
-; GFX10WGP-NOT: .amdhsa_workgroup_processor_mode 0
-; GFX10CU: .amdhsa_workgroup_processor_mode 0
-; GFX10-NOT: .amdhsa_memory_ordered 0
define amdgpu_kernel void @wavefront_seq_cst() {
+ ; GFX6-LABEL: name: wavefront_seq_cst
+ ; GFX6: bb.0.entry:
+ ; GFX6-NEXT: S_ENDPGM 0
+ ;
+ ; GFX8-LABEL: name: wavefront_seq_cst
+ ; GFX8: bb.0.entry:
+ ; GFX8-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10WGP-LABEL: name: wavefront_seq_cst
+ ; GFX10WGP: bb.0.entry:
+ ; GFX10WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX10CU-LABEL: name: wavefront_seq_cst
+ ; GFX10CU: bb.0.entry:
+ ; GFX10CU-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11WGP-LABEL: name: wavefront_seq_cst
+ ; GFX11WGP: bb.0.entry:
+ ; GFX11WGP-NEXT: S_ENDPGM 0
+ ;
+ ; GFX11CU-LABEL: name: wavefront_seq_cst
+ ; GFX11CU: bb.0.entry:
+ ; GFX11CU-NEXT: S_ENDPGM 0
entry:
fence syncscope("wavefront") seq_cst
ret void
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