[llvm] 3af514e - [InstCombine] Add tests for improving `sub X, ~Y` -> `add X, -Y`; NFC

Noah Goldstein via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 19 10:15:23 PST 2023


Author: Noah Goldstein
Date: 2023-11-19T12:15:03-06:00
New Revision: 3af514e5aea2a3e7774c667232ccd0d611cf911a

URL: https://github.com/llvm/llvm-project/commit/3af514e5aea2a3e7774c667232ccd0d611cf911a
DIFF: https://github.com/llvm/llvm-project/commit/3af514e5aea2a3e7774c667232ccd0d611cf911a.diff

LOG: [InstCombine] Add tests for improving `sub X, ~Y` -> `add X, -Y`; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/fold-sub-of-not-to-inc-of-add.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/fold-sub-of-not-to-inc-of-add.ll b/llvm/test/Transforms/InstCombine/fold-sub-of-not-to-inc-of-add.ll
index 1e315696c3110c3..cabca7d8d5f718a 100644
--- a/llvm/test/Transforms/InstCombine/fold-sub-of-not-to-inc-of-add.ll
+++ b/llvm/test/Transforms/InstCombine/fold-sub-of-not-to-inc-of-add.ll
@@ -22,6 +22,20 @@ define i32 @p0_scalar(i32 %x, i32 %y) {
   ret i32 %t1
 }
 
+define i8 @p0_scalar_not_truly_negatable(i8 %x, i8 %y) {
+; CHECK-LABEL: @p0_scalar_not_truly_negatable(
+; CHECK-NEXT:    [[XX:%.*]] = xor i8 [[X:%.*]], 123
+; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[Y:%.*]], -46
+; CHECK-NEXT:    [[YY_NEG:%.*]] = add i8 [[TMP1]], 1
+; CHECK-NEXT:    [[R:%.*]] = add i8 [[YY_NEG]], [[XX]]
+; CHECK-NEXT:    ret i8 [[R]]
+;
+  %xx = xor i8 %x, 123
+  %yy = xor i8 %y, 45
+  %r = sub i8 %xx, %yy
+  ret i8 %r
+}
+
 ;------------------------------------------------------------------------------;
 ; Vector tests
 ;------------------------------------------------------------------------------;
@@ -79,7 +93,7 @@ define i32 @n4(i32 %x, i32 %y) {
 ; CHECK-NEXT:    ret i32 [[T1]]
 ;
   %t0 = xor i32 %x, -1
-  %t1 = sub i32 %t0, %y ; swapped
+  %t1 = sub i32 %t0, %y  ; swapped
   ret i32 %t1
 }
 
@@ -89,7 +103,7 @@ define i32 @n5_is_not_not(i32 %x, i32 %y) {
 ; CHECK-NEXT:    [[T1:%.*]] = add i32 [[T0_NEG]], [[Y:%.*]]
 ; CHECK-NEXT:    ret i32 [[T1]]
 ;
-  %t0 = xor i32 %x, 2147483647 ; not -1
+  %t0 = xor i32 %x, 2147483647  ; not -1
   %t1 = sub i32 %y, %t0
   ret i32 %t1
 }
@@ -100,7 +114,7 @@ define <2 x i32> @n5_is_not_not_vec_splat(<2 x i32> %x, <2 x i32> %y) {
 ; CHECK-NEXT:    [[T1:%.*]] = add <2 x i32> [[T0_NEG]], [[Y:%.*]]
 ; CHECK-NEXT:    ret <2 x i32> [[T1]]
 ;
-  %t0 = xor <2 x i32> %x, <i32 2147483647, i32 2147483647> ; signmask, but not -1
+  %t0 = xor <2 x i32> %x, <i32 2147483647, i32 2147483647>  ; signmask, but not -1
   %t1 = sub <2 x i32> %y, %t0
   ret <2 x i32> %t1
 }


        


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