[llvm] [InstSimplify] Simplify the select with integer comparison relationship (PR #66668)
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Mon Nov 13 06:26:19 PST 2023
https://github.com/vfdff updated https://github.com/llvm/llvm-project/pull/66668
>From 3e60315d3f2bfdc0c6624b3ee4e3a3fd7d4a1895 Mon Sep 17 00:00:00 2001
From: zhongyunde 00443407 <zhongyunde at huawei.com>
Date: Mon, 18 Sep 2023 05:07:53 -0400
Subject: [PATCH 1/2] [tests] precommit tests for ValueTracking
x-y+1 is positive when x > y, so abs (x-y+1) --> x-y+1
Fixes https://github.com/llvm/llvm-project/issues/54735
---
.../Transforms/InstSimplify/select-icmp.ll | 162 ++++++++++++++++++
1 file changed, 162 insertions(+)
create mode 100755 llvm/test/Transforms/InstSimplify/select-icmp.ll
diff --git a/llvm/test/Transforms/InstSimplify/select-icmp.ll b/llvm/test/Transforms/InstSimplify/select-icmp.ll
new file mode 100755
index 000000000000000..fd520b13d37640d
--- /dev/null
+++ b/llvm/test/Transforms/InstSimplify/select-icmp.ll
@@ -0,0 +1,162 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes=instsimplify -S | FileCheck %s
+
+; TODO: https://alive2.llvm.org/ce/z/3ybZRl
+define i32 @pr54735_slt(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_slt(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp sle i32 [[SUB]], -1
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp slt i32 %x, %y ; x<y ? abs (x-y+1): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nsw i32 %x, %y
+ %add = add nsw i32 %sub, 1
+ %neg = xor i32 %sub, -1 ; sub nsw i32 0, %add
+ %abscond = icmp sle i32 %sub, -1
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; https://alive2.llvm.org/ce/z/fTTsdT
+define i32 @pr54735_sgt(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_sgt(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[SUB]], -1
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp sgt i32 %x, %y ; x>y ? abs (x-y+1): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nsw i32 %x, %y
+ %add = add nsw i32 %sub, 1
+ %neg = xor i32 %sub, -1 ; sub nsw i32 0, %add
+ %abscond = icmp slt i32 %sub, -1
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; Negative test: https://alive2.llvm.org/ce/z/oZyu4M
+define i8 @pr54735_without_nsw (i8 %x, i8 %y) {
+; CHECK-LABEL: @pr54735_without_nsw(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub i8 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add i8 [[SUB]], 1
+; CHECK-NEXT: [[NEG:%.*]] = xor i8 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i8 [[SUB]], -1
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i8 [[NEG]], i8 [[ADD]]
+; CHECK-NEXT: ret i8 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i8 0
+;
+entry:
+ %cmp = icmp sgt i8 %x, %y
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub i8 %x, %y
+ %add = add i8 %sub, 1
+ %neg = xor i8 %sub, -1
+ %abscond = icmp slt i8 %sub, -1
+ %abs = select i1 %abscond, i8 %neg, i8 %add
+ ret i8 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i8 0
+}
+
+define i32 @pr54735_sle(i32 noundef %x, i32 noundef %y) {
+; CHECK-LABEL: @pr54735_sle(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[SUB]], -1
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp sle i32 %x, %y ; x<=y ? abs (x-y+1): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nsw i32 %x, %y
+ %add = add nsw i32 %sub, 1
+ %neg = xor i32 %sub, -1 ; sub nsw i32 0, %add
+ %abscond = icmp slt i32 %sub, -1
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; Negative test: https://alive2.llvm.org/ce/z/Yqv4x2
+define i8 @pr54735_unexpect_const (i8 %x, i8 %y) {
+; CHECK-LABEL: @pr54735_unexpect_const(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub i8 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add i8 [[SUB]], 2
+; CHECK-NEXT: [[NEG:%.*]] = xor i8 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i8 [[SUB]], -2
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i8 [[NEG]], i8 [[ADD]]
+; CHECK-NEXT: ret i8 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i8 0
+;
+entry:
+ %cmp = icmp sgt i8 %x, %y ; x>y ? abs (x-y+2): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub i8 %x, %y
+ %add = add i8 %sub, 2 ; x-y+2
+ %neg = xor i8 %sub, -1 ; y-x-1
+ %neg1 = sub i8 %neg, 1 ; y-x-2
+ %abscond = icmp slt i8 %sub, -2
+ %abs = select i1 %abscond, i8 %neg, i8 %add
+ ret i8 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i8 0
+}
>From 1ffe54eca765ee55826b889a9710002748b8a4c2 Mon Sep 17 00:00:00 2001
From: zhongyunde 00443407 <zhongyunde at huawei.com>
Date: Mon, 18 Sep 2023 05:07:53 -0400
Subject: [PATCH 2/2] [ValueTracking] Infer relationship for the select with
ICmp
x -nsw y < C is false when x > y and C <= 0
Alive2 proof: https://alive2.llvm.org/ce/z/LC_kQx
Fixes https://github.com/llvm/llvm-project/issues/54735
---
llvm/lib/Analysis/ValueTracking.cpp | 11 +++++++++++
llvm/test/Transforms/InstSimplify/select-icmp.ll | 5 +----
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 923ff043fe71057..a66f5facac088cb 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -8294,6 +8294,17 @@ static std::optional<bool> isImpliedCondICmps(const ICmpInst *LHS,
if (areMatchingOperands(L0, L1, R0, R1, AreSwappedOps))
return isImpliedCondMatchingOperands(LPred, RPred, AreSwappedOps);
+ if (LPred == ICmpInst::ICMP_SGT) {
+ Value *X;
+ Value *Y;
+ const APInt *CI;
+ // x > y and C <= 0 ==> x -nsw y < C is false
+ if (match(R0, m_NSWSub(m_Value(X), m_Value(Y))) && match(R1, m_APInt(CI)) &&
+ areMatchingOperands(L0, L1, X, Y, AreSwappedOps) && CI->isNonPositive())
+ if (isImpliedCondMatchingOperands(LPred, RPred, AreSwappedOps) == false)
+ return false;
+ }
+
// Can we infer anything when the 0-operands match and the 1-operands are
// constants (not necessarily matching)?
const APInt *LC, *RC;
diff --git a/llvm/test/Transforms/InstSimplify/select-icmp.ll b/llvm/test/Transforms/InstSimplify/select-icmp.ll
index fd520b13d37640d..4e72903172e2a5f 100755
--- a/llvm/test/Transforms/InstSimplify/select-icmp.ll
+++ b/llvm/test/Transforms/InstSimplify/select-icmp.ll
@@ -42,10 +42,7 @@ define i32 @pr54735_sgt(i32 %x, i32 %y) {
; CHECK: cond.true:
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
-; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
-; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[SUB]], -1
-; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
-; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK-NEXT: ret i32 [[ADD]]
; CHECK: cond.end:
; CHECK-NEXT: ret i32 0
;
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