[llvm] [X86][MC] Support encoding of EGPR for APX (PR #71909)

[Shengchen Kan via llvm-commits]

================
@@ -683,10 +747,11 @@ void X86MCCodeEmitter::emitMemModRMByte(
       return;
     }
 
-    // If the base is not EBP/ESP/R12/R13 and there is no displacement, use
-    // simple indirect register encoding, this handles addresses like [EAX].
-    // The encoding for [EBP] or[R13] with no displacement means [disp32] so we
-    // handle it by emitting a displacement of 0 later.
+    // If the base is not EBP/ESP/R12/R13/R20/R21/R28/R29 and there is no
+    // displacement, use simple indirect register encoding, this handles
+    // addresses like [EAX]. The encoding for [EBP], [R13], [R20], [R21], [R28]
+    // or [R29] with no displacement means [disp32] so we handle it by emitting
+    // a displacement of 0 later.
----------------
KanRobert wrote:

Yes, it works b/c mod 7
```
unsigned X86MCCodeEmitter::getX86RegNum(const MCOperand &MO) const {
  return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()) & 0x7;
}
```


https://github.com/llvm/llvm-project/pull/71909