[llvm] [AMDGPU] Prefer lower total register usage in regions with spilling (PR #71882)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,353 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
+# RUN: llc -march=amdgcn -mcpu=gfx90a -start-before=machine-scheduler -stop-after=machine-scheduler -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
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arsenm wrote:

-run-pass=machine-scheduler should work. also don't need -verify-machineinstrs, used -verify-misched to make sure we get a verify run with LiveIntervals 

https://github.com/llvm/llvm-project/pull/71882