[llvm] [NFC][RISCV] Add `SiFive` prefix for XSfvfnrclipxfqf description (PR #71141)

Shao-Ce SUN via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 2 21:46:42 PDT 2023


https://github.com/sunshaoce created https://github.com/llvm/llvm-project/pull/71141

`'XSfvfnrclipxfqf' (FP32-to-int8 Ranged Clip Instructions)` -> `'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions)`

>From 05b449368edd78a886d09bc2364d218fabfe2f52 Mon Sep 17 00:00:00 2001
From: Shao-Ce SUN <sunshaoce at outlook.com>
Date: Fri, 3 Nov 2023 12:45:15 +0800
Subject: [PATCH] [NFC][RISCV] Add `SiFive` prefix for XSfvfnrclipxfqf
 description

---
 llvm/lib/Target/RISCV/RISCVFeatures.td | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index 1bcf190a583de18..f078ffd58e5e5e0 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -846,11 +846,11 @@ def HasVendorXSfvfwmaccqqq : Predicate<"Subtarget->hasVendorXSfvfwmaccqqq()">,
 
 def FeatureVendorXSfvfnrclipxfqf
     : SubtargetFeature<"xsfvfnrclipxfqf", "HasVendorXSfvfnrclipxfqf", "true",
-                       "'XSfvfnrclipxfqf' (FP32-to-int8 Ranged Clip Instructions)",
+                       "'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions)",
                        [FeatureStdExtZve32f]>;
 def HasVendorXSfvfnrclipxfqf : Predicate<"Subtarget->hasVendorXSfvfnrclipxfqf()">,
                                AssemblerPredicate<(all_of FeatureVendorXSfvfnrclipxfqf),
-                               "'XSfvfnrclipxfqf' (FP32-to-int8 Ranged Clip Instructions)">;
+                               "'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions)">;
 
 def FeatureVendorXCVbitmanip
     : SubtargetFeature<"xcvbitmanip", "HasVendorXCVbitmanip", "true",



More information about the llvm-commits mailing list