[llvm] [GISel] Remove BitVector from RegBank. Use tablegen CoverageData tables directly. NFC (PR #71105)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-regalloc

Author: Craig Topper (topperc)

<details>
<summary>Changes</summary>

RegBanks are allocated as global variables. The use of BitVector causes a static global constructor to be used. The BitVector is initialized from a table of bits that is created by tablegen. We can keep a pointer to that data and use it as the bit vector instead.

This does require a little bit of manual indexing and reimplementation of BitVector::count.

---
Full diff: https://github.com/llvm/llvm-project/pull/71105.diff


2 Files Affected:

- (modified) llvm/include/llvm/CodeGen/RegisterBank.h (+6-3) 
- (modified) llvm/lib/CodeGen/RegisterBank.cpp (+10-14) 


``````````diff
diff --git a/llvm/include/llvm/CodeGen/RegisterBank.h b/llvm/include/llvm/CodeGen/RegisterBank.h
index ee295c7cdde0048..9e0c3bd884a39ae 100644
--- a/llvm/include/llvm/CodeGen/RegisterBank.h
+++ b/llvm/include/llvm/CodeGen/RegisterBank.h
@@ -13,7 +13,7 @@
 #ifndef LLVM_CODEGEN_REGISTERBANK_H
 #define LLVM_CODEGEN_REGISTERBANK_H
 
-#include "llvm/ADT/BitVector.h"
+#include <cstdint>
 
 namespace llvm {
 // Forward declarations.
@@ -28,8 +28,9 @@ class TargetRegisterInfo;
 class RegisterBank {
 private:
   unsigned ID;
+  unsigned NumRegClasses;
   const char *Name;
-  BitVector ContainedRegClasses;
+  const uint32_t *CoveredClasses;
 
   /// Sentinel value used to recognize register bank not properly
   /// initialized yet.
@@ -40,7 +41,9 @@ class RegisterBank {
 
 public:
   RegisterBank(unsigned ID, const char *Name, const uint32_t *CoveredClasses,
-               unsigned NumRegClasses);
+               unsigned NumRegClasses)
+      : ID(ID), NumRegClasses(NumRegClasses), Name(Name),
+        CoveredClasses(CoveredClasses) {}
 
   /// Get the identifier of this register bank.
   unsigned getID() const { return ID; }
diff --git a/llvm/lib/CodeGen/RegisterBank.cpp b/llvm/lib/CodeGen/RegisterBank.cpp
index 8e0a0b0dc2824a0..a30e4ac6cfeb317 100644
--- a/llvm/lib/CodeGen/RegisterBank.cpp
+++ b/llvm/lib/CodeGen/RegisterBank.cpp
@@ -22,14 +22,6 @@ using namespace llvm;
 
 const unsigned RegisterBank::InvalidID = UINT_MAX;
 
-RegisterBank::RegisterBank(unsigned ID, const char *Name,
-                           const uint32_t *CoveredClasses,
-                           unsigned NumRegClasses)
-    : ID(ID), Name(Name) {
-  ContainedRegClasses.resize(NumRegClasses);
-  ContainedRegClasses.setBitsInMask(CoveredClasses);
-}
-
 bool RegisterBank::verify(const RegisterBankInfo &RBI,
                           const TargetRegisterInfo &TRI) const {
   assert(isValid() && "Invalid register bank");
@@ -62,13 +54,13 @@ bool RegisterBank::verify(const RegisterBankInfo &RBI,
 
 bool RegisterBank::covers(const TargetRegisterClass &RC) const {
   assert(isValid() && "RB hasn't been initialized yet");
-  return ContainedRegClasses.test(RC.getID());
+  return (CoveredClasses[RC.getID() / 32] & (1U << RC.getID() % 32)) != 0;
 }
 
 bool RegisterBank::isValid() const {
   return ID != InvalidID && Name != nullptr &&
          // A register bank that does not cover anything is useless.
-         !ContainedRegClasses.empty();
+         CoveredClasses != nullptr && NumRegClasses != 0;
 }
 
 bool RegisterBank::operator==(const RegisterBank &OtherRB) const {
@@ -91,15 +83,19 @@ void RegisterBank::print(raw_ostream &OS, bool IsForDebug,
   OS << getName();
   if (!IsForDebug)
     return;
+
+  unsigned Count = 0;
+  for (int i = 0, e = ((NumRegClasses + 31) / 32); i != e; ++i)
+    Count += llvm::popcount(CoveredClasses[i]);
+
   OS << "(ID:" << getID() << ")\n"
      << "isValid:" << isValid() << '\n'
-     << "Number of Covered register classes: " << ContainedRegClasses.count()
-     << '\n';
+     << "Number of Covered register classes: " << Count << '\n';
   // Print all the subclasses if we can.
   // This register classes may not be properly initialized yet.
-  if (!TRI || ContainedRegClasses.empty())
+  if (!TRI || NumRegClasses == 0)
     return;
-  assert(ContainedRegClasses.size() == TRI->getNumRegClasses() &&
+  assert(NumRegClasses == TRI->getNumRegClasses() &&
          "TRI does not match the initialization process?");
   OS << "Covered register classes:\n";
   ListSeparator LS;

``````````

</details>


https://github.com/llvm/llvm-project/pull/71105