kmitropoulou wrote:
I am sorry for the inconvenience. It is a bit tricky to cut the code in smaller patches.
This patch tries to find load coercion opportunities between load instructions. We have two main cases:
```
Example 1:
Before load coercion
BB1:
...
%V1 = load <2 x i32>, ptr %P
...
%V2 = load i32, ptr %P
%V3 = add i32 %V2, 42
...
After load coercion
BB1:
...
%V1 = load <2 x i32>, ptr %P
%0 = bitcast <2 x i32> %V1 to i64
%1 = trunc i64 %0 to i32
...
%V3 = add i32 %1, 42
...
Example 2:
Before load coercion
BB1: BB2:
%V1 = load <2 x i32>, ptr %P br label %BB3
br label %BB3 /
\ /
BB3:
%V2 = load i32, ptr %P
After load coercion
BB1: BB2:
%V1 = load <2 x i32>, ptr %P %V2' = load i32, ptr %P
%0 = bitcast <2 x i32> %V1 to i64 br label %BB3
%1 = trunc i64 %0 to i32 /
br label %BB3 /
\ /
BB3:
%V2 = phi i32 [ %1, %BB1], [ %V2', %BB2 ]
```
The collection for both examples is done in this patch. The code generation for the first example is done in this patch. But, the code generation of the second case is done in the third patch https://github.com/llvm/llvm-project/pull/68669 .
https://github.com/llvm/llvm-project/pull/68666