[llvm] [AArch64][GlobalISel] Adopt some Ld1Lane* patterns for GlobalISel to reduce codegen regressions (PR #69607)

[Vladislav Dzhidzhoev via llvm-commits]

================
@@ -62,9 +63,16 @@ bool GIMatchTableExecutor::isBaseWithConstantOffset(
 bool GIMatchTableExecutor::isObviouslySafeToFold(MachineInstr &MI,
                                                  MachineInstr &IntoMI) const {
   // Immediate neighbours are already folded.
-  if (MI.getParent() == IntoMI.getParent() &&
-      std::next(MI.getIterator()) == IntoMI.getIterator())
-    return true;
+  // Any G_CONSTANT between immediate neighbours can be ignored.
+  if (MI.getParent() == IntoMI.getParent()) {
+    auto IntoIt = IntoMI.getIterator();
+    auto NextIt = std::next(MI.getIterator());
+    while (!NextIt.isEnd() && NextIt != IntoIt &&
+           NextIt->getOpcode() == TargetOpcode::G_CONSTANT)
+      ++NextIt;
+    if (NextIt == IntoIt)
+      return true;
+  }
----------------
dzhidzhoev wrote:

Before InstructionSelect, `test_v4i16_post_reg_ld1lane` function from `llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll` contains this fragment:
```
  %4:fpr(s16) = G_LOAD %0:gpr(p0) :: (load (s16) from %ir.bar)
  %6:gpr(s32) = G_CONSTANT i32 1
  %5:fpr(<4 x s16>) = G_INSERT_VECTOR_ELT %3:fpr, %4:fpr(s16), %6:gpr(s32)
```
G_CONSTANT between instructions prevented Ld1Lane64PatGISel from being applied to this.

https://github.com/llvm/llvm-project/pull/69607