[llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)

[Nikita Popov via llvm-commits]

https://github.com/nikic commented:

This is very unusual, and I'm surprised that InstCombine is doing this. What we do in literally all other cases (add, udiv, etc) is to drop the flags instead if the recursive SimplifyDemanded call succeeds. I'd recommend doing that here.

https://github.com/llvm/llvm-project/pull/70041