[llvm] [DAG] Fold (mul (sext (add_nsw x, c1)), c2) -> (add (mul (sext x), c2), c1*c2) (PR #69667)

via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 20 05:30:50 PDT 2023


LiqinWeng wrote:

> I think maybe we should implement `RISCVTTIImpl::shouldConsiderAddressTypePromotion` for RISC-V. Which enables CodeGenPrepare to do some address optimizations. I have a patch for that in my downstream I can try to extract.

OK, I will abandon this patch

https://github.com/llvm/llvm-project/pull/69667


More information about the llvm-commits mailing list