[llvm] 3cac608 - [LV] Add interleave only test case with reduction requiring casts.

Florian Hahn via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 19 12:52:38 PDT 2023


Author: Florian Hahn
Date: 2023-10-19T20:52:21+01:00
New Revision: 3cac608fbd0811b2f5c59c6e13148162ccd8543e

URL: https://github.com/llvm/llvm-project/commit/3cac608fbd0811b2f5c59c6e13148162ccd8543e
DIFF: https://github.com/llvm/llvm-project/commit/3cac608fbd0811b2f5c59c6e13148162ccd8543e.diff

LOG: [LV] Add interleave only test case with reduction requiring casts.

This adds test coverage for a crash exposed by
d311126349b8fe1684d62154a9fa5a7bbb0b713.

Added: 
    

Modified: 
    llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll b/llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
index b74829c698ce3a0..8832d66a2c83ac3 100644
--- a/llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
+++ b/llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
@@ -232,3 +232,40 @@ loop:
 exit:
   ret void
 }
+
+define i16 @reduction_with_casts() {
+; CHECK-LABEL: define i16 @reduction_with_casts() {
+; CHECK:       vector.body:
+; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH:%.+]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY:%.+]] ]
+; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP2:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP3:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:    [[TMP0:%.*]] = and i32 [[VEC_PHI]], 65535
+; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[VEC_PHI1]], 65535
+; CHECK-NEXT:    [[TMP2]] = add i32 [[TMP0]], 1
+; CHECK-NEXT:    [[TMP3]] = add i32 [[TMP1]], 1
+; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 9998
+; CHECK-NEXT:    br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]]
+; CHECK:       middle.block:
+; CHECK-NEXT:    [[BIN_RDX:%.*]] = add i32 [[TMP3]], [[TMP2]]
+; CHECK-NEXT:    br i1 false, label [[EXIT:%.*]], label %scalar.ph
+;
+entry:
+  br label %loop
+
+loop:
+  %count.0.in1 = phi i32 [ 0, %entry ], [ %add, %loop ]
+  %iv = phi i16 [ 1, %entry ], [ %iv.next, %loop ]
+  %conv1 = and i32 %count.0.in1, 65535
+  %add = add nuw nsw i32 %conv1, 1
+  %iv.next = add i16 %iv, 1
+  %cmp = icmp eq i16 %iv.next, 10000
+  br i1 %cmp, label %exit, label %loop
+
+exit:
+  %add.lcssa = phi i32 [ %add, %loop ]
+  %count.0 = trunc i32 %add.lcssa to i16
+  ret i16 %count.0
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; DBG: {{.*}}


        


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