[llvm] [DAG] Constant Folding for U/SMUL_LOHI (PR #69437)

[Pierre van Houtryve via llvm-commits]

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@@ -2619,37 +2619,38 @@ define i64 @v_test_udiv64_mulhi_fold(i64 %arg) {
 ; VI-LABEL: v_test_udiv64_mulhi_fold:
 ; VI:       ; %bb.0:
 ; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; VI-NEXT:    v_mov_b32_e32 v4, 0xa7c5
-; VI-NEXT:    v_mul_u32_u24_e32 v3, 0x500, v4
-; VI-NEXT:    v_mul_hi_u32_u24_e32 v2, 0x500, v4
-; VI-NEXT:    v_add_u32_e32 v3, vcc, 0x4237, v3
-; VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v2, vcc
-; VI-NEXT:    v_add_u32_e32 v6, vcc, 0xa9000000, v3
-; VI-NEXT:    s_mov_b32 s6, 0xfffe7960
-; VI-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v6, s6, 0
-; VI-NEXT:    v_addc_u32_e32 v7, vcc, v5, v4, vcc
-; VI-NEXT:    v_mul_lo_u32 v4, v7, s6
+; VI-NEXT:    s_mov_b32 s4, 0x346d900
+; VI-NEXT:    s_add_u32 s4, 0x4237, s4
+; VI-NEXT:    v_mov_b32_e32 v2, 0xa9000000
+; VI-NEXT:    v_add_u32_e32 v6, vcc, s4, v2
+; VI-NEXT:    s_mov_b32 s4, 0xfffe7960
+; VI-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v6, s4, 0
+; VI-NEXT:    s_addc_u32 s6, 0, 0
+; VI-NEXT:    s_cmp_lg_u64 vcc, 0
+; VI-NEXT:    s_addc_u32 s6, s6, 0xa7c5
+; VI-NEXT:    s_mul_i32 s4, s6, 0xfffe7960
 ; VI-NEXT:    v_sub_u32_e32 v3, vcc, v3, v6
-; VI-NEXT:    v_mul_hi_u32 v8, v6, v2
-; VI-NEXT:    v_add_u32_e32 v5, vcc, v4, v3
+; VI-NEXT:    v_add_u32_e32 v5, vcc, s4, v3
 ; VI-NEXT:    v_mad_u64_u32 v[3:4], s[4:5], v6, v5, 0
-; VI-NEXT:    v_add_u32_e32 v8, vcc, v8, v3
-; VI-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v7, v2, 0
-; VI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v4, vcc
-; VI-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], v7, v5, 0
-; VI-NEXT:    v_add_u32_e32 v2, vcc, v8, v2
-; VI-NEXT:    v_addc_u32_e32 v2, vcc, v9, v3, vcc
+; VI-NEXT:    v_mul_hi_u32 v7, v6, v2
+; VI-NEXT:    v_add_u32_e32 v7, vcc, v7, v3
+; VI-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], s6, v2, 0
+; VI-NEXT:    v_addc_u32_e32 v8, vcc, 0, v4, vcc
+; VI-NEXT:    v_mad_u64_u32 v[4:5], s[4:5], s6, v5, 0
+; VI-NEXT:    v_add_u32_e32 v2, vcc, v7, v2
+; VI-NEXT:    v_addc_u32_e32 v2, vcc, v8, v3, vcc
 ; VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
 ; VI-NEXT:    v_add_u32_e32 v2, vcc, v2, v4
 ; VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; VI-NEXT:    v_add_u32_e32 v4, vcc, v6, v2
-; VI-NEXT:    v_addc_u32_e32 v5, vcc, v7, v3, vcc
-; VI-NEXT:    v_mad_u64_u32 v[2:3], s[4:5], v0, v5, 0
-; VI-NEXT:    v_mul_hi_u32 v6, v0, v4
+; VI-NEXT:    v_mov_b32_e32 v4, s6
----------------
Pierre-vh wrote:

Good to know! Currently we don't fold on GFX10 because we can't handle FMAD_FTZ yet.
About FMAD_FTZ, does it need special handling to fold? Can we have denormals in this scenario?



https://github.com/llvm/llvm-project/pull/69437