[PATCH] D151848: [X86, Peephole] Enable FoldImmediate for X86

Thu Oct 5 15:22:44 PDT 2023

MatzeB accepted this revision.
MatzeB added a comment.
This revision is now accepted and ready to land.

- Did you consider CMP64rr, CMP32rr ?

LGTM with nitpicks resolved.

================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:4873
+      break;
+  }
+  return NewOpcode;
----------------
MatzeB wrote:
> When inspecting something like `grep "32ri\s*=" build/lib/Target/X86/X86GenInstrInfo.inc` or `grep "64rr\s*=" build/lib/Target/X86/X86GenInstrInfo.inc` I noticed a couple more that probably work?
> * ADC32rr / ADC32ri  (also ADD64rr)
> * ROL32rCL / ROL32ri
> * ROR32rCL / ROR32ri
> * RCL32rCL / RCL32ri
> * RCR32rCL / RCR32ri
> * SBB32rr / SBB32ri  (also SBB64rr)
> * TEST32rr / TEST32ri  (also TEST64rr)
* CMP32rr / CMP32ri

================
Comment at: llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll:176-182
+; X86-NEXT:    xorl %edx, %edx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    testb %al, %al
+; X86-NEXT:    testb %dl, %dl
 ; X86-NEXT:    jne .LBB10_2
 ; X86-NEXT:  # %bb.1: # %if
 ; X86-NEXT:    xorl %eax, %eax
+; X86-NEXT:    xorl %edx, %edx
----------------
Odd to see new `xor %edx, %edx` added here. Is that the result of poison or undef values? (in that case "meh" we can ignore it)

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151848/new/

https://reviews.llvm.org/D151848