[llvm] [RISCV][GlobalISel] Lower calls to variadic functions (PR #68271)

Nitin John Raj via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 5 11:37:24 PDT 2023


https://github.com/nitinjohnraj updated https://github.com/llvm/llvm-project/pull/68271

>From 145dd9a4e5a8fb00e14af2fb8712472f0921f75a Mon Sep 17 00:00:00 2001
From: Nitin John Raj <nitin.raj at sifive.com>
Date: Wed, 4 Oct 2023 16:01:35 -0700
Subject: [PATCH 1/3] [RISCV][GlobalISel] Lower calls to variadic functions

---
 .../Target/RISCV/GISel/RISCVCallLowering.cpp  |  4 ---
 .../GlobalISel/call-lowering/variadic-call.ll | 33 +++++++++++++++++++
 2 files changed, 33 insertions(+), 4 deletions(-)
 create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll

diff --git a/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp b/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
index 5505f89a32f21be..a362a709329d5df 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
@@ -252,10 +252,6 @@ bool RISCVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
   const Function &F = MF.getFunction();
   CallingConv::ID CC = F.getCallingConv();
 
-  // TODO: Support vararg functions.
-  if (Info.IsVarArg)
-    return false;
-
   // TODO: Support all argument types.
   for (auto &AInfo : Info.OrigArgs) {
     if (AInfo.Ty->isIntegerTy())
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll b/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll
new file mode 100644
index 000000000000000..232e7cf39ac634e
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -mtriple=riscv64 -global-isel --stop-before=legalizer < %s -o - \
+; RUN:   | FileCheck %s
+
+declare noundef signext i32 @foo(i32 noundef signext, ...)
+
+define dso_local noundef signext i32 @main() {
+  ; CHECK-LABEL: name: main
+  ; CHECK: bb.1.entry:
+  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.retval
+  ; CHECK-NEXT:   G_STORE [[C]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %ir.retval)
+  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
+  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
+  ; CHECK-NEXT:   $x10 = COPY [[C1]](s64)
+  ; CHECK-NEXT:   $x11 = COPY [[C2]](s64)
+  ; CHECK-NEXT:   $x12 = COPY [[C3]](s64)
+  ; CHECK-NEXT:   $x13 = COPY [[C4]](s64)
+  ; CHECK-NEXT:   PseudoCALL target-flags(riscv-call) @_Z1fiz, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+  ; CHECK-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 32
+  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ASSERT_SEXT]](s64)
+  ; CHECK-NEXT:   [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[TRUNC]](s32)
+  ; CHECK-NEXT:   $x10 = COPY [[SEXT]](s64)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+entry:
+  %retval = alloca i32, align 4
+  store i32 0, ptr %retval, align 4
+  %call = call noundef signext i32 (i32, ...) @(i32 noundef signext 0, i32 noundef signext 1, i32 noundef signext 2, i32 noundef signext 3)
+  ret i32 %call
+}

>From 165e20b455271d674dbcc5f366f82e0243d6db17 Mon Sep 17 00:00:00 2001
From: Nitin John Raj <nitin.raj at sifive.com>
Date: Wed, 4 Oct 2023 16:08:07 -0700
Subject: [PATCH 2/3] Add test for rv32

---
 .../GlobalISel/call-lowering/variadic-call.ll | 24 +++----------------
 1 file changed, 3 insertions(+), 21 deletions(-)

diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll b/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll
index 232e7cf39ac634e..073e6f375f5258e 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll
@@ -1,33 +1,15 @@
 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -mtriple=riscv32 -global-isel --stop-before=legalizer < %s -o - \
+; RUN:   | FileCheck %s
 ; RUN: llc -mtriple=riscv64 -global-isel --stop-before=legalizer < %s -o - \
 ; RUN:   | FileCheck %s
 
 declare noundef signext i32 @foo(i32 noundef signext, ...)
 
 define dso_local noundef signext i32 @main() {
-  ; CHECK-LABEL: name: main
-  ; CHECK: bb.1.entry:
-  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
-  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.retval
-  ; CHECK-NEXT:   G_STORE [[C]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %ir.retval)
-  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
-  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
-  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
-  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
-  ; CHECK-NEXT:   $x10 = COPY [[C1]](s64)
-  ; CHECK-NEXT:   $x11 = COPY [[C2]](s64)
-  ; CHECK-NEXT:   $x12 = COPY [[C3]](s64)
-  ; CHECK-NEXT:   $x13 = COPY [[C4]](s64)
-  ; CHECK-NEXT:   PseudoCALL target-flags(riscv-call) @_Z1fiz, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10
-  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
-  ; CHECK-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 32
-  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ASSERT_SEXT]](s64)
-  ; CHECK-NEXT:   [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[TRUNC]](s32)
-  ; CHECK-NEXT:   $x10 = COPY [[SEXT]](s64)
-  ; CHECK-NEXT:   PseudoRET implicit $x10
 entry:
   %retval = alloca i32, align 4
   store i32 0, ptr %retval, align 4
-  %call = call noundef signext i32 (i32, ...) @(i32 noundef signext 0, i32 noundef signext 1, i32 noundef signext 2, i32 noundef signext 3)
+  %call = call noundef signext i32 (i32, ...) @foo(i32 noundef signext 0, i32 noundef signext 1, i32 noundef signext 2, i32 noundef signext 3)
   ret i32 %call
 }

>From f87707a3388fca9a35f40e4bfdcea481f2f4d01e Mon Sep 17 00:00:00 2001
From: Nitin John Raj <nitin.raj at sifive.com>
Date: Thu, 5 Oct 2023 11:37:12 -0700
Subject: [PATCH 3/3] Removed unnecessary qualifiers on test functions, and
 added check-prefixes

---
 .../GlobalISel/call-lowering/variadic-call.ll | 43 +++++++++++++++++--
 1 file changed, 39 insertions(+), 4 deletions(-)

diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll b/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll
index 073e6f375f5258e..d0f962c301130c5 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/call-lowering/variadic-call.ll
@@ -1,12 +1,47 @@
 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 ; RUN: llc -mtriple=riscv32 -global-isel --stop-before=legalizer < %s -o - \
-; RUN:   | FileCheck %s
+; RUN:   | FileCheck --check-prefix=RV32I %s
 ; RUN: llc -mtriple=riscv64 -global-isel --stop-before=legalizer < %s -o - \
-; RUN:   | FileCheck %s
+; RUN:   | FileCheck --check-prefix=RV64I %s
 
-declare noundef signext i32 @foo(i32 noundef signext, ...)
+declare i32 @foo(i32 noundef signext, ...)
 
-define dso_local noundef signext i32 @main() {
+define i32 @main() {
+  ; RV32I-LABEL: name: main
+  ; RV32I: bb.1.entry:
+  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+  ; RV32I-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+  ; RV32I-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
+  ; RV32I-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
+  ; RV32I-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.retval
+  ; RV32I-NEXT:   G_STORE [[C]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %ir.retval)
+  ; RV32I-NEXT:   $x10 = COPY [[C]](s32)
+  ; RV32I-NEXT:   $x11 = COPY [[C1]](s32)
+  ; RV32I-NEXT:   $x12 = COPY [[C2]](s32)
+  ; RV32I-NEXT:   $x13 = COPY [[C3]](s32)
+  ; RV32I-NEXT:   PseudoCALL target-flags(riscv-call) @foo, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10
+  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+  ; RV32I-NEXT:   $x10 = COPY [[COPY]](s32)
+  ; RV32I-NEXT:   PseudoRET implicit $x10
+  ;
+  ; RV64I-LABEL: name: main
+  ; RV64I: bb.1.entry:
+  ; RV64I-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+  ; RV64I-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.retval
+  ; RV64I-NEXT:   G_STORE [[C]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %ir.retval)
+  ; RV64I-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+  ; RV64I-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+  ; RV64I-NEXT:   [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
+  ; RV64I-NEXT:   [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
+  ; RV64I-NEXT:   $x10 = COPY [[C1]](s64)
+  ; RV64I-NEXT:   $x11 = COPY [[C2]](s64)
+  ; RV64I-NEXT:   $x12 = COPY [[C3]](s64)
+  ; RV64I-NEXT:   $x13 = COPY [[C4]](s64)
+  ; RV64I-NEXT:   PseudoCALL target-flags(riscv-call) @foo, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10
+  ; RV64I-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+  ; RV64I-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 32
+  ; RV64I-NEXT:   $x10 = COPY [[ASSERT_SEXT]](s64)
+  ; RV64I-NEXT:   PseudoRET implicit $x10
 entry:
   %retval = alloca i32, align 4
   store i32 0, ptr %retval, align 4



More information about the llvm-commits mailing list