[llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 4 12:37:34 PDT 2023


================
@@ -376,6 +389,124 @@ bool RISCVInstructionSelector::selectSExtInreg(MachineInstr &MI,
   return true;
 }
 
+/// Returns the RISCVCC::CondCode that corresponds to the CmpInst::Predicate CC.
+/// CC Must be an ICMP Predicate.
+static RISCVCC::CondCode getRISCVCCFromICMP(CmpInst::Predicate CC) {
+  switch (CC) {
+  default:
+    llvm_unreachable("Expected ICMP CmpInst::Predicate.");
+  case CmpInst::Predicate::ICMP_EQ:
+    return RISCVCC::COND_EQ;
+  case CmpInst::Predicate::ICMP_NE:
+    return RISCVCC::COND_NE;
+  case CmpInst::Predicate::ICMP_ULT:
+    return RISCVCC::COND_LTU;
+  case CmpInst::Predicate::ICMP_SLT:
+    return RISCVCC::COND_LT;
+  case CmpInst::Predicate::ICMP_UGE:
+    return RISCVCC::COND_GEU;
+  case CmpInst::Predicate::ICMP_SGE:
+    return RISCVCC::COND_GE;
+  }
+}
+
+MachineInstr *RISCVInstructionSelector::createICMPForBranch(
----------------
topperc wrote:

Yes. Or just pass 3 variables by reference like `translateSetCCForBranch` in SelectionDAG.

Creating a new MachineInstr has to heap allocate it, insert it into the basic block instruction linked list, update MachineRegisterInfo. Maybe some other things. That seems like overkill.

https://github.com/llvm/llvm-project/pull/68247


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