[compiler-rt] [X86] Add detection for more Tremont models (PR #67150)

[via llvm-commits]

https://github.com/libenc updated https://github.com/llvm/llvm-project/pull/67150

>From 8a52235af7d4f486bc2bd1d125d08b55ca577307 Mon Sep 17 00:00:00 2001
From: libenc <75132456+libenc at users.noreply.github.com>
Date: Mon, 25 Sep 2023 10:22:55 +0800
Subject: [PATCH] [X86] Add detection for more Tremont models

Fix the issue that only some server series Tremont processors
(Elkhart Lake) can be detected as Tremont, while Snow Ridge and
the client series (Jasper Lake & Lakefield) will be guessed
as Goldmont.
---
 compiler-rt/lib/builtins/cpu_model.c | 3 +++
 llvm/lib/TargetParser/Host.cpp       | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/compiler-rt/lib/builtins/cpu_model.c b/compiler-rt/lib/builtins/cpu_model.c
index 6a0cc8f7a402dad..0950e72e8d1dd80 100644
--- a/compiler-rt/lib/builtins/cpu_model.c
+++ b/compiler-rt/lib/builtins/cpu_model.c
@@ -553,6 +553,9 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
       *Type = INTEL_GOLDMONT_PLUS;
       break;
     case 0x86:
+    case 0x8a: // Lakefield
+    case 0x96: // Snow Ridge
+    case 0x9c: // Jasper Lake
       CPU = "tremont";
       *Type = INTEL_TREMONT;
       break;
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index c79595295d1bd81..0485051bcfd3bb9 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -913,6 +913,9 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
       *Type = X86::INTEL_GOLDMONT_PLUS;
       break;
     case 0x86:
+    case 0x8a: // Lakefield
+    case 0x96: // Snow Ridge
+    case 0x9c: // Jasper Lake
       CPU = "tremont";
       *Type = X86::INTEL_TREMONT;
       break;