[llvm] 1a73a6b - [InstCombine] Add pre-commit tests for PR66733. NFC.

[Yingwei Zheng via llvm-commits]

Author: Yingwei Zheng
Date: 2023-09-21T16:21:53+08:00
New Revision: 1a73a6b80b54cd23ee8380c6fa3304847e5cb5d1

URL: https://github.com/llvm/llvm-project/commit/1a73a6b80b54cd23ee8380c6fa3304847e5cb5d1
DIFF: https://github.com/llvm/llvm-project/commit/1a73a6b80b54cd23ee8380c6fa3304847e5cb5d1.diff

LOG: [InstCombine] Add pre-commit tests for PR66733. NFC.

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/and.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll
index 7ec4b0dbb0a12f0..0ab404b28fa4dbd 100644
--- a/llvm/test/Transforms/InstCombine/and.ll
+++ b/llvm/test/Transforms/InstCombine/and.ll
@@ -2539,3 +2539,21 @@ define i32 @and_zext_eq_odd_commuted(i32 %a) {
   %r = and i32 %not, %a
   ret i32 %r
 }
+
+; Tests from PR66733
+define i32 @and_zext_eq_zero(i32 %A, i32 %C)  {
+; CHECK-LABEL: @and_zext_eq_zero(
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 [[A:%.*]], 0
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP1]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = lshr i32 [[A]], [[C:%.*]]
+; CHECK-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP3]], -1
+; CHECK-NEXT:    [[TMP5:%.*]] = and i32 [[TMP2]], [[TMP4]]
+; CHECK-NEXT:    ret i32 [[TMP5]]
+;
+  %1 = icmp eq i32 %A, 0
+  %2 = zext i1 %1 to i32
+  %3 = lshr i32 %A, %C
+  %4 = xor i32 %3, -1
+  %5 = and i32 %2, %4
+  ret i32 %5
+}