[llvm] ad762f2 - [X86] Regenerate pr39098.ll

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-09-20T16:58:00+01:00
New Revision: ad762f2a9f9f4b9073d6558f365942aed0799abd

URL: https://github.com/llvm/llvm-project/commit/ad762f2a9f9f4b9073d6558f365942aed0799abd
DIFF: https://github.com/llvm/llvm-project/commit/ad762f2a9f9f4b9073d6558f365942aed0799abd.diff

LOG: [X86] Regenerate pr39098.ll

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/pr39098.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/pr39098.ll b/llvm/test/CodeGen/X86/pr39098.ll
index 56a3d37e5777fee..3db96c3f698c81b 100644
--- a/llvm/test/CodeGen/X86/pr39098.ll
+++ b/llvm/test/CodeGen/X86/pr39098.ll
@@ -1,13 +1,15 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
 
 define dso_local void @test_cancel2(ptr %p1, ptr %p2) {
-; CHECK:       # %entry
-; CHECK-NEXT:  movl    (%rdi), %eax
-; CHECK-NEXT:  shrl    %eax
-; CHECK-NEXT:  andl    $524287, %eax
-; CHECK-NEXT:  movl    %eax, (%rsi)
-; CHECK-NEXT:  movb    $0, 4(%rsi)
-; CHECK-NEXT:  retq
+; CHECK-LABEL: test_cancel2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl (%rdi), %eax
+; CHECK-NEXT:    shrl %eax
+; CHECK-NEXT:    andl $524287, %eax # imm = 0x7FFFF
+; CHECK-NEXT:    movl %eax, (%rsi)
+; CHECK-NEXT:    movb $0, 4(%rsi)
+; CHECK-NEXT:    retq
 entry:
   %0 = load i40, ptr %p1, align 8
   %shl414 = shl i40 %0, 19