[PATCH] D159053: [RISCV] Support select/merge like ops for fp16 vectors when only have Zvfhmin

[Jianjian Guan via Phabricator via llvm-commits]

jacquesguan marked an inline comment as done.
jacquesguan added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6008
+                         DAG.getIntPtrConstant(0, DL, /*isTarget=*/true));
+      break;
+    }
----------------
craig.topper wrote:
> The `break;` is unreachable due to the `return` above it.
Fixed.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D159053/new/

https://reviews.llvm.org/D159053