[llvm] [update_mir_test_checks] Precommit test for multiple defs of vreg (PR #66482)

[Jay Foad via llvm-commits]

https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/66482

>From 1ebe65c71faa8d6651ac2423cec677d1c42b0776 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Fri, 15 Sep 2023 10:35:01 +0100
Subject: [PATCH] [update_mir_test_checks] Precommit test for multiple defs of
 vreg

XFAIL it until it is fixed by an upcoming commit.
---
 .../Inputs/multiple-defs.mir                  | 12 ++++++++++++
 .../Inputs/multiple-defs.mir.expected         | 19 +++++++++++++++++++
 .../update_mir_test_checks/multiple-defs.test |  7 +++++++
 3 files changed, 38 insertions(+)
 create mode 100644 llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir
 create mode 100644 llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir.expected
 create mode 100644 llvm/test/tools/UpdateTestChecks/update_mir_test_checks/multiple-defs.test

diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir
new file mode 100644
index 000000000000000..ff12ed7770beca0
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir
@@ -0,0 +1,12 @@
+# RUN: llc -mtriple=x86_64 -run-pass=none -verify-machineinstrs %s -o - | FileCheck %s
+
+---
+name: test
+body: |
+  bb.0:
+    %0:gr32 = IMPLICIT_DEF
+    %1:gr32 = IMPLICIT_DEF
+    %0:gr32 = IMPLICIT_DEF
+    %2:gr32 = IMPLICIT_DEF
+    KILL %0, %2
+...
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir.expected b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir.expected
new file mode 100644
index 000000000000000..d2b05dd6b585bee
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir.expected
@@ -0,0 +1,19 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64 -run-pass=none -verify-machineinstrs %s -o - | FileCheck %s
+
+---
+name: test
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test
+    ; CHECK: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
+    ; CHECK-NEXT: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
+    ; CHECK-NEXT: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF
+    ; CHECK-NEXT: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF
+    ; CHECK-NEXT: KILL [[DEF2]], [[DEF2]]
+    %0:gr32 = IMPLICIT_DEF
+    %1:gr32 = IMPLICIT_DEF
+    %0:gr32 = IMPLICIT_DEF
+    %2:gr32 = IMPLICIT_DEF
+    KILL %0, %2
+...
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/multiple-defs.test b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/multiple-defs.test
new file mode 100644
index 000000000000000..b6f329290c1ee20
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/multiple-defs.test
@@ -0,0 +1,7 @@
+## Check that update_mir_test_checks handles multiple definitions of the same
+## virtual register (after coming out of SSA form).
+
+# RUN: cp -f %S/Inputs/multiple-defs.mir %t.mir && %update_mir_test_checks %t.mir
+# RUN: diff -u %S/Inputs/multiple-defs.mir.expected %t.mir
+# RUN: FileCheck %t.mir < %t.mir
+# XFAIL: *