[llvm] [BOLT] Improve handling of relocations targeting specific instructions (PR #66395)

[Job Noorman via llvm-commits]

mtvec wrote:

> I'm not familiar yet with RISC asm, could you please describe why loading value from symbol results in text relocation (e.g. reference to the instruction)? Just interesting :)

To materialize a 32-bit pc-relative address on RISC-V, you need two instruction: one `auipc` which adds a 20-bit immediate to the upper 20 bits of pc, and another I- or S-type instruction (e.g., `ld`, `addi`) to add the remaining 12 bits. The `auipc` gets a relocation pointing to the symbol you want the address of. The second instruction gets a relocation pointing to the `auipc`. The reason it has to point there (as opposed to the target symbol) is that the two instructions are not necessarily consecutive so the location of the `auipc` must be known in order to calculate the correct immediate for the second instruction.

See the [psABI](https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#pc-relative-symbol-addresses) for more info.

https://github.com/llvm/llvm-project/pull/66395