[llvm] [AArch64] New subtarget features to control ldp and stp formation, fo… (PR #66098)

[Manos Anagnostakis via llvm-commits]

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@@ -2136,6 +2136,18 @@ bool AArch64LoadStoreOpt::tryToPairLdStInst(MachineBasicBlock::iterator &MBBI) {
   if (!TII->isCandidateToMergeOrPair(MI))
     return false;
 
+  // Fetch the memoperand of the load/store that is a candidate for
+  // combination.
+  MachineMemOperand *MemOp = MI.memoperands().front();
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manosanaggh wrote:

This may have to do with the regression on x64, because its a memoperand assertion. Although I am still confused a bit. Thanks for the hint! Should help a lot!

https://github.com/llvm/llvm-project/pull/66098