[llvm] processtiedpairs (PR #65976)

[Simon Pilgrim via llvm-commits]

================
@@ -235,15 +236,26 @@ define <4 x i32> @test17(<4 x i32> %a, <4 x i32> %b) {
 
 
 define <4 x i32> @test18(<4 x i32> %a, <4 x i32> %b) {
-; CHECK-LABEL: test18:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    pxor %xmm2, %xmm2
-; CHECK-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
-; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
-; CHECK-NEXT:    pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
-; CHECK-NEXT:    por %xmm0, %xmm2
-; CHECK-NEXT:    movdqa %xmm2, %xmm0
-; CHECK-NEXT:    retq
+; CHECK-LV-LABEL: test18:
+; CHECK-LV:       # %bb.0:
+; CHECK-LV-NEXT:    pxor %xmm2, %xmm2
+; CHECK-LV-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
+; CHECK-LV-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
+; CHECK-LV-NEXT:    pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
+; CHECK-LV-NEXT:    por %xmm0, %xmm2
+; CHECK-LV-NEXT:    movdqa %xmm2, %xmm0
+; CHECK-LV-NEXT:    retq
+;
+; CHECK-LIS-LABEL: test18:
+; CHECK-LIS:       # %bb.0:
+; CHECK-LIS-NEXT:    pxor %xmm2, %xmm2
+; CHECK-LIS-NEXT:    pxor %xmm3, %xmm3
+; CHECK-LIS-NEXT:    pblendw {{.*#+}} xmm3 = xmm0[0,1],xmm3[2,3,4,5,6,7]
+; CHECK-LIS-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[1,0,1,1]
+; CHECK-LIS-NEXT:    pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
+; CHECK-LIS-NEXT:    por %xmm0, %xmm2
+; CHECK-LIS-NEXT:    movdqa %xmm2, %xmm0
----------------
RKSimon wrote:

We have similar issues with multiple zero vector registers, so normally I'd say this is acceptable but I'm worried this change might be encouraging the underlying problem?

https://github.com/llvm/llvm-project/pull/65976