[llvm] [RISCV] Match indices based on significant bits when forming strided ops (PR #65777)

[Philip Reames via llvm-commits]

preames wrote:

> Does this allow a vector of i8 indices like <0, 128, 0, 128, 0, 128, 0, 128> to be considered a stride of 128?

Yep, it gets this wrong.  I'm going to add the reduced test case, and then rework the patch.  Good catch.


https://github.com/llvm/llvm-project/pull/65777