[PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr

[Eli Friedman via Phabricator via llvm-commits]

efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM

In D159265#4640515 <https://reviews.llvm.org/D159265#4640515>, @jaykang10 wrote:

> Thanks for comment.
>
>> Do we need to be concerned at all about big-endian here?  (Actually, also for D159267 <https://reviews.llvm.org/D159267>.)  This is basically bitcasting from `<2 x i32>` to `<1 x i64>`.
>
> I am not sure... It would be fine because compiler adds the `rev` instructions where they are needed for big-endian... but it could be wrong...
> If you are concerned about something for big-endian, please let me know.

BITCAST itself should be fine; I meant, if we use a substitute sequence, we still need a REV, but there isn't any code to generate it.



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:23159
+  SDValue UADDLV = EXTRACT_VEC_ELT.getOperand(0);
+  if (UADDLV.getOpcode() != AArch64ISD::UADDLV ||
+      UADDLV.getValueType() != MVT::v4i32 ||
----------------
I think we should be able to generalize this to other operations that only produce a result in the low element, but I guess we can leave that for a followup.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159265/new/

https://reviews.llvm.org/D159265