[PATCH] D158750: New intrinsic void llvm.amdgcn.s.nop(i16)

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SOPInstructions.td:1166
 
+// Define variant marked as having side effects for use with intrinsic
+def S_NOP_SE : SOPP_Pseudo<"" , (ins i16imm:$simm16), "$simm16",
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dstuttard wrote:
> arsenm wrote:
> > The regular one should be marked with side effects
> My initial implementation did that - even though I was unsure if a nop should be tagged as having side-effects.
> Also, there were failures in some of the lit tests (mir variants) which made me even more reluctant to tag s_nop as having side-effects since it would no longer be a NFC for vanilla s_nops.
> I got failures (mainly (all?) out of order matches) for:
>   LLVM :: CodeGen/AMDGPU/copy-vgpr-clobber-spill-vgpr.mir
>   LLVM :: CodeGen/AMDGPU/fold-immediate-operand-shrink.mir
>   LLVM :: CodeGen/AMDGPU/sched-barrier-pre-RA.mir
>   LLVM :: CodeGen/AMDGPU/sched-group-barrier-pipeline-solver.mir
>   LLVM :: CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
>   LLVM :: CodeGen/AMDGPU/spill-empty-live-interval.mir
> 
First I've noticed this odd bug that it doesn't have side effects before. That should be fixed independently.

Also, pseudos that modify any real instruction should use a lowercase suffix


Repository:
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  https://reviews.llvm.org/D158750/new/

https://reviews.llvm.org/D158750