[PATCH] D159272: [LoongArch] Improve codegen for atomic ops

[hev via Phabricator via llvm-commits]

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This PR improves memory barriers generated by atomic operations.

Memory barrier semantics of LL/SC:
LL: <memory-barrier> + <load-exclusive>
SC: <store-conditional> + <memory-barrier>

Changes:

1. Remove unnecessary memory barriers before LL and between LL/SC.
2. Fix acquire semantics. (If the SC instruction is not executed, then acquire semantics cannot be guaranteed. So, acquire barrier need to be generated when memory ordering has acquire.)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D159272

Files:
  llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
  llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
  llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
  llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
  llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
  llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-minmax.ll
  llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
  llvm/unittests/Target/LoongArch/InstSizes.cpp

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