[PATCH] D158839: [SDAG] Add SimplifyDemandedBits support for ISD::SPLAT_VECTOR

[Luke Lau via Phabricator via llvm-commits]

luke created this revision.
luke added reviewers: reames, craig.topper, RKSimon, paulwalker-arm, david-arm, sdesmalen.
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This improves some cases where a splat_vector uses a build_pair that can be
simplified, e.g:

(shl x:i64, splat_vector (build_pair x1:i32, x2:i32))

shl only demands the bottom 6 bits, so this patch allows it to simplify it to:

(shl x:i64, splat_vector (build_pair x1:i32, undef:i32))

Which in turn improves some cases where a splat_vector_parts is lowered on
RV32.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D158839

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-select.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-select.ll
  llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-select.ll
  llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-select.ll
  llvm/test/CodeGen/RISCV/rvv/mscatter-combine.ll
  llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll

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