[PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.

[Dinar Temirbulatov via Phabricator via llvm-commits]

dtemirbulatov updated this revision to Diff 551498.
dtemirbulatov marked 2 inline comments as done.
dtemirbulatov added a comment.

Resolved remained remarks, added support for half sized mask, N-sized mask. if just minimum SVE known then allow SVE TBL with just one operand transform.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152205/new/

https://reviews.llvm.org/D152205

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll
  llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-vector-shuffle.ll

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