[PATCH] D158138: [RISCV] Expand PseudoTAIL with t2 instead of t1 for Zicfilp.

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 16 19:38:01 PDT 2023


jrtc27 added a comment.

In D158138#4593975 <https://reviews.llvm.org/D158138#4593975>, @craig.topper wrote:

> In D158138#4593972 <https://reviews.llvm.org/D158138#4593972>, @jrtc27 wrote:
>
>> https://github.com/riscv/riscv-cfi/issues/125#issuecomment-1681520704
>
> Is it because x7 is the landing pad label? So if the call used x7 as the address then its clearly does not contain a landing pad label? I'm just guessing.

So why not make x6 the landing pad label if they want everything to be in one register...


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158138/new/

https://reviews.llvm.org/D158138



More information about the llvm-commits mailing list