[PATCH] D157231: [SPARC][IAS] Add definitions for v9 State Registers

Sergei Barannikov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 16 01:03:41 PDT 2023


barannikov88 added inline comments.


================
Comment at: llvm/test/MC/Sparc/sparcv9-instructions.s:425
         ! V9: rd %pc, %o7               ! encoding: [0x9f,0x41,0x40,0x00]
         rd %pc, %o7
+        ! V9: rd %asi, %g1              ! encoding: [0x83,0x40,0xc0,0x00]
----------------
barannikov88 wrote:
> koakuma wrote:
> > barannikov88 wrote:
> > > IIUC all of these should complain about missing feature on V8. This can probably be done by adding some checks to validateTargetOperandClass or checkTargetMatchPredicate.
> > > 
> > How do I do this? Seems like in both functions I can only get the raw register number, I don't know how to recover the textual name (e.g whether it was originally referred to as %asi or %asr3)...
> validateTargetOperandClass allows you to examine whatever you stored in SparcOperand. If the spelling is important, you can store that information there, see e.g. RegOp::RegisterKind.
> The method should probably return Match_MissingFeature on failure.
> 
There may be other solutions, but I'm not sure I understand the issue.



CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157231/new/

https://reviews.llvm.org/D157231



More information about the llvm-commits mailing list