[llvm] 08d92de - [BPF] Fix in/out argument constraints for CORE_MEM instructions

Eduard Zingerman via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 14 16:38:04 PDT 2023


Author: Eduard Zingerman
Date: 2023-08-15T02:34:21+03:00
New Revision: 08d92dedd26c66bd203cc3b45f982d7aeb214995

URL: https://github.com/llvm/llvm-project/commit/08d92dedd26c66bd203cc3b45f982d7aeb214995
DIFF: https://github.com/llvm/llvm-project/commit/08d92dedd26c66bd203cc3b45f982d7aeb214995.diff

LOG: [BPF] Fix in/out argument constraints for CORE_MEM instructions

When LLVM is build with `LLVM_ENABLE_EXPENSIVE_CHECKS=ON` option the
following C code snippet:

    struct t {
      int a;
    } __attribute__((preserve_access_index));

    void test(struct t *t) {
      t->a = 42;
    }

Causes an assertion:

$ clang -g -O2 -c --target=bpf -mcpu=v2 t.c -o /dev/null

Function Live Ins: $r1 in %0

bb.0.entry:
  liveins: $r1
  DBG_VALUE $r1, $noreg, !"t", ...
  %0:gpr = COPY $r1
  DBG_VALUE %0:gpr, $noreg, !"t", ...
  %1:gpr = LD_imm64 @"llvm.t:0:0$0:0"
  %3:gpr = ADD_rr %0:gpr(tied-def 0), killed %1:gpr
  %4:gpr = MOV_ri 42
  CORE_MEM killed %4:gpr, 411, %0:gpr, @"llvm.t:0:0$0:0", ...
  RET debug-location !25; t.c:7:1

*** Bad machine code: Explicit definition marked as use ***
- function:    test
- basic block: %bb.0 entry (0x6210000d8a90)
- instruction: CORE_MEM killed %4:gpr, 411, %0:gpr, @"llvm.t:0:0$0:0", ...
- operand 0:   killed %4:gpr

This happens because `CORE_MEM` instruction is defined to have output
operands:

  def CORE_MEM : TYPE_LD_ST<BPF_MEM.Value, BPF_W.Value,
                            (outs GPR:$dst),
                            (ins u64imm:$opcode, GPR:$src, u64imm:$offset),
                            "$dst = core_mem($opcode, $src, $offset)",
                            []>;

As documented in [1]:

> By convention, the LLVM code generator orders instruction operands
> so that all register definitions come before the register uses, even
> on architectures that are normally printed in other orders.

In other words, the first argument for `CORE_MEM` is considered to be
a "def", while in reality it is "use":

  %1:gpr = LD_imm64 @"llvm.t:0:0$0:0"
  %3:gpr = ADD_rr %0:gpr(tied-def 0), killed %1:gpr
  %4:gpr = MOV_ri 42
   '---------------.
                   v
  CORE_MEM killed %4:gpr, 411, %0:gpr, @"llvm.t:0:0$0:0", ...

Here is how `CORE_MEM` is constructed in
`BPFMISimplifyPatchable::checkADDrr()`:

    BuildMI(*DefInst->getParent(), *DefInst, DefInst->getDebugLoc(), TII->get(COREOp))
        .add(DefInst->getOperand(0)).addImm(Opcode).add(*BaseOp)
        .addGlobalAddress(GVal);

Note that first operand is constructed as `.add(DefInst->getOperand(0))`.

For `LD{D,W,H,B}` instructions the `DefInst->getOperand(0)` is a
destination register of a load, so instruction is constructed in
accordance with `outs` declaration.

For `ST{D,W,H,B}` instructions the `DefInst->getOperand(0)` is a
source register of a store (value to be stored), so instruction
violates the `outs` declaration.

This commit fixes the issue by splitting `CORE_MEM` in three
instructions: `CORE_ST`, `CORE_LD64`, `CORE_LD32` with correct `outs`
specifications.

[1] https://llvm.org/docs/CodeGenerator.html#the-machineinstr-class

Differential Revision: https://reviews.llvm.org/D157806

Added: 
    llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-1.ll
    llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-2.ll
    llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-3.ll

Modified: 
    llvm/lib/Target/BPF/BPFInstrInfo.td
    llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
    llvm/lib/Target/BPF/BTFDebug.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/BPF/BPFInstrInfo.td b/llvm/lib/Target/BPF/BPFInstrInfo.td
index a0defeda8118cf..ed2caeba189233 100644
--- a/llvm/lib/Target/BPF/BPFInstrInfo.td
+++ b/llvm/lib/Target/BPF/BPFInstrInfo.td
@@ -69,6 +69,8 @@ def u64imm   : Operand<i64> {
   let PrintMethod = "printImm64Operand";
 }
 
+def gpr_or_imm : Operand<i64>;
+
 def i64immSExt32 : PatLeaf<(i64 imm),
                 [{return isInt<32>(N->getSExtValue()); }]>;
 def i32immSExt32 : PatLeaf<(i32 imm),
@@ -476,16 +478,19 @@ class LOADi64<BPFWidthModifer SizeOp, BPFModeModifer ModOp, string OpcodeStr, Pa
     : LOAD<SizeOp, ModOp, OpcodeStr, [(set i64:$dst, (OpNode ADDRri:$addr))]>;
 
 let isCodeGenOnly = 1 in {
-  def CORE_MEM : TYPE_LD_ST<BPF_MEM.Value, BPF_W.Value,
-                            (outs GPR:$dst),
-                            (ins u64imm:$opcode, GPR:$src, u64imm:$offset),
-                            "$dst = core_mem($opcode, $src, $offset)",
-                            []>;
-  def CORE_ALU32_MEM : TYPE_LD_ST<BPF_MEM.Value, BPF_W.Value,
-                                  (outs GPR32:$dst),
-                                  (ins u64imm:$opcode, GPR:$src, u64imm:$offset),
-                                  "$dst = core_alu32_mem($opcode, $src, $offset)",
-                                  []>;
+  class CORE_LD<RegisterClass RegClass, string Sz>
+                : TYPE_LD_ST<BPF_MEM.Value, BPF_W.Value,
+                             (outs RegClass:$dst),
+                             (ins u64imm:$opcode, GPR:$src, u64imm:$offset),
+                             "$dst = core_ld"#Sz#"($opcode, $src, $offset)",
+                             []>;
+  def CORE_LD64 : CORE_LD<GPR, "64">;
+  def CORE_LD32 : CORE_LD<GPR32, "32">;
+  def CORE_ST   : TYPE_LD_ST<BPF_MEM.Value, BPF_W.Value,
+                             (outs),
+                             (ins gpr_or_imm:$src, u64imm:$opcode, GPR:$ptr, u64imm:$offset),
+                             "core_st($src, $opcode, $ptr, $offset)",
+                             []>;
   let Constraints = "$dst = $src" in {
     def CORE_SHIFT : ALU_RR<BPF_ALU64, BPF_LSH, 0,
                              (outs GPR:$dst),

diff  --git a/llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp b/llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
index ed0b2b6403a719..514b605f6fa671 100644
--- a/llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
+++ b/llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
@@ -93,11 +93,30 @@ void BPFMISimplifyPatchable::initialize(MachineFunction &MFParm) {
   LLVM_DEBUG(dbgs() << "*** BPF simplify patchable insts pass ***\n\n");
 }
 
+static bool isSTX32(unsigned Opcode) {
+  return Opcode == BPF::STB32 || Opcode == BPF::STH32 || Opcode == BPF::STW32;
+}
+
+static bool isSTX64(unsigned Opcode) {
+  return Opcode == BPF::STB || Opcode == BPF::STH || Opcode == BPF::STW ||
+         Opcode == BPF::STD;
+}
+
+static bool isLDX32(unsigned Opcode) {
+  return Opcode == BPF::LDB32 || Opcode == BPF::LDH32 || Opcode == BPF::LDW32;
+}
+
+static bool isLDX64(unsigned Opcode) {
+  return Opcode == BPF::LDB || Opcode == BPF::LDH || Opcode == BPF::LDW ||
+         Opcode == BPF::LDD;
+}
+
+static bool isLDSX(unsigned Opcode) {
+  return Opcode == BPF::LDBSX || Opcode == BPF::LDHSX || Opcode == BPF::LDWSX;
+}
+
 bool BPFMISimplifyPatchable::isLoadInst(unsigned Opcode) {
-  return Opcode == BPF::LDD || Opcode == BPF::LDW || Opcode == BPF::LDH ||
-         Opcode == BPF::LDB || Opcode == BPF::LDW32 || Opcode == BPF::LDH32 ||
-         Opcode == BPF::LDB32 || Opcode == BPF::LDWSX || Opcode == BPF::LDHSX ||
-         Opcode == BPF::LDBSX;
+  return isLDX32(Opcode) || isLDX64(Opcode) || isLDSX(Opcode);
 }
 
 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI,
@@ -118,15 +137,12 @@ void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI,
     MachineInstr *DefInst = MO.getParent();
     unsigned Opcode = DefInst->getOpcode();
     unsigned COREOp;
-    if (Opcode == BPF::LDB || Opcode == BPF::LDH || Opcode == BPF::LDW ||
-        Opcode == BPF::LDD || Opcode == BPF::STB || Opcode == BPF::STH ||
-        Opcode == BPF::STW || Opcode == BPF::STD || Opcode == BPF::LDWSX ||
-        Opcode == BPF::LDHSX || Opcode == BPF::LDBSX)
-      COREOp = BPF::CORE_MEM;
-    else if (Opcode == BPF::LDB32 || Opcode == BPF::LDH32 ||
-             Opcode == BPF::LDW32 || Opcode == BPF::STB32 ||
-             Opcode == BPF::STH32 || Opcode == BPF::STW32)
-      COREOp = BPF::CORE_ALU32_MEM;
+    if (isLDX64(Opcode) || isLDSX(Opcode))
+      COREOp = BPF::CORE_LD64;
+    else if (isLDX32(Opcode))
+      COREOp = BPF::CORE_LD32;
+    else if (isSTX64(Opcode) || isSTX32(Opcode))
+      COREOp = BPF::CORE_ST;
     else
       continue;
 
@@ -138,9 +154,7 @@ void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI,
     // Reject the form:
     //   %1 = ADD_rr %2, %3
     //   *(type *)(%2 + 0) = %1
-    if (Opcode == BPF::STB || Opcode == BPF::STH || Opcode == BPF::STW ||
-        Opcode == BPF::STD || Opcode == BPF::STB32 || Opcode == BPF::STH32 ||
-        Opcode == BPF::STW32) {
+    if (isSTX64(Opcode) || isSTX32(Opcode)) {
       const MachineOperand &Opnd = DefInst->getOperand(0);
       if (Opnd.isReg() && Opnd.getReg() == MO.getReg())
         continue;

diff  --git a/llvm/lib/Target/BPF/BTFDebug.cpp b/llvm/lib/Target/BPF/BTFDebug.cpp
index e7b4f364876229..2fe4206b194c1c 100644
--- a/llvm/lib/Target/BPF/BTFDebug.cpp
+++ b/llvm/lib/Target/BPF/BTFDebug.cpp
@@ -1349,8 +1349,9 @@ void BTFDebug::beginInstruction(const MachineInstr *MI) {
     // If the insn is "r2 = LD_imm64 @<an TypeIdAttr global>",
     // The LD_imm64 result will be replaced with a btf type id.
     processGlobalValue(MI->getOperand(1));
-  } else if (MI->getOpcode() == BPF::CORE_MEM ||
-             MI->getOpcode() == BPF::CORE_ALU32_MEM ||
+  } else if (MI->getOpcode() == BPF::CORE_LD64 ||
+             MI->getOpcode() == BPF::CORE_LD32 ||
+             MI->getOpcode() == BPF::CORE_ST ||
              MI->getOpcode() == BPF::CORE_SHIFT) {
     // relocation insn is a load, store or shift insn.
     processGlobalValue(MI->getOperand(3));
@@ -1529,8 +1530,9 @@ bool BTFDebug::InstLower(const MachineInstr *MI, MCInst &OutMI) {
         return true;
       }
     }
-  } else if (MI->getOpcode() == BPF::CORE_MEM ||
-             MI->getOpcode() == BPF::CORE_ALU32_MEM ||
+  } else if (MI->getOpcode() == BPF::CORE_LD64 ||
+             MI->getOpcode() == BPF::CORE_LD32 ||
+             MI->getOpcode() == BPF::CORE_ST ||
              MI->getOpcode() == BPF::CORE_SHIFT) {
     const MachineOperand &MO = MI->getOperand(3);
     if (MO.isGlobal()) {

diff  --git a/llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-1.ll b/llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-1.ll
new file mode 100644
index 00000000000000..60d32e42bb7d1e
--- /dev/null
+++ b/llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-1.ll
@@ -0,0 +1,164 @@
+; RUN: llc -mtriple=bpf -mcpu=v2 < %s | FileCheck -check-prefixes=CHECK,V2 %s
+; RUN: llc -mtriple=bpf -mcpu=v4 < %s | FileCheck -check-prefixes=CHECK,V4 %s
+
+; Verify that BPFMISimplifyPatchable::checkADDrr correctly rewrites
+; store instructions.
+;
+; Generated from the following source code:
+;   struct t {
+;     unsigned char  ub;
+;     unsigned short uh;
+;     unsigned int   uw;
+;     unsigned long  ud;
+;   } __attribute__((preserve_access_index));
+;
+;   void foo(volatile struct t *t) {
+;     t->ub = 1;
+;     t->uh = 2;
+;     t->uw = 3;
+;     t->ud = 4;
+;   }
+;
+; Using the following command:
+;   clang -g -O2 -S -emit-llvm --target=bpf t.c -o t.ll
+
+@"llvm.t:0:0$0:0" = external global i64, !llvm.preserve.access.index !0 #0
+@"llvm.t:0:2$0:1" = external global i64, !llvm.preserve.access.index !0 #0
+@"llvm.t:0:4$0:2" = external global i64, !llvm.preserve.access.index !0 #0
+@"llvm.t:0:8$0:3" = external global i64, !llvm.preserve.access.index !0 #0
+
+; Function Attrs: nofree nounwind
+define dso_local void @foo(ptr noundef %t, i64 noundef %v) local_unnamed_addr #1 !dbg !18 {
+entry:
+  call void @llvm.dbg.value(metadata ptr %t, metadata !24, metadata !DIExpression()), !dbg !26
+  call void @llvm.dbg.value(metadata i64 %v, metadata !25, metadata !DIExpression()), !dbg !26
+  %conv = trunc i64 %v to i8, !dbg !27
+  %0 = load i64, ptr @"llvm.t:0:0$0:0", align 8
+  %1 = getelementptr i8, ptr %t, i64 %0
+  %2 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 0, ptr %1)
+  store volatile i8 %conv, ptr %2, align 8, !dbg !28, !tbaa !29
+  %conv1 = trunc i64 %v to i16, !dbg !36
+  %3 = load i64, ptr @"llvm.t:0:2$0:1", align 8
+  %4 = getelementptr i8, ptr %t, i64 %3
+  %5 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 1, ptr %4)
+  store volatile i16 %conv1, ptr %5, align 2, !dbg !37, !tbaa !38
+  %conv2 = trunc i64 %v to i32, !dbg !39
+  %6 = load i64, ptr @"llvm.t:0:4$0:2", align 8
+  %7 = getelementptr i8, ptr %t, i64 %6
+  %8 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 2, ptr %7)
+  store volatile i32 %conv2, ptr %8, align 4, !dbg !40, !tbaa !41
+  %9 = load i64, ptr @"llvm.t:0:8$0:3", align 8
+  %10 = getelementptr i8, ptr %t, i64 %9
+  %11 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 3, ptr %10)
+  store volatile i64 %v, ptr %11, align 8, !dbg !42, !tbaa !43
+  ret void, !dbg !44
+}
+
+; CHECK: foo:
+; CHECK:      prologue_end
+; CHECK-NEXT: .Ltmp[[LABEL_UB:.*]]:
+; CHECK-NEXT: .Ltmp
+; V2-NEXT:            *(u8 *)(r1 + 0) = r2
+; V4-NEXT:            *(u8 *)(r1 + 0) = w2
+; CHECK-NEXT:         .loc
+; CHECK-NEXT: .Ltmp[[LABEL_UH:.*]]:
+; CHECK-NEXT: .Ltmp
+; V2-NEXT:            *(u16 *)(r1 + 2) = r2
+; V4-NEXT:            *(u16 *)(r1 + 2) = w2
+; CHECK-NEXT:         .loc
+; CHECK-NEXT: .Ltmp[[LABEL_UW:.*]]:
+; CHECK-NEXT: .Ltmp
+; V2-NEXT:            *(u32 *)(r1 + 4) = r2
+; V4-NEXT:            *(u32 *)(r1 + 4) = w2
+; CHECK-NEXT:         .loc
+; CHECK-NEXT: .Ltmp[[LABEL_UD:.*]]:
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:         *(u64 *)(r1 + 8) = r2
+
+; CHECK: .section .BTF
+; CHECK: .long [[STR_T:.*]]  # BTF_KIND_STRUCT(id = [[ID:.*]])
+
+; CHECK: .byte   116     # string offset=[[STR_T]]
+; CHECK: .ascii  "0:0"   # string offset=[[STR_UB:.*]]
+; CHECK: .ascii  "0:1"   # string offset=[[STR_UH:.*]]
+; CHECK: .ascii  "0:2"   # string offset=[[STR_UW:.*]]
+; CHECK: .ascii  "0:3"   # string offset=[[STR_UD:.*]]
+
+; CHECK:     # FieldReloc
+; CHECK:      .long .Ltmp[[LABEL_UB]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_UB]]
+; CHECK-NEXT: .long 0
+; CHECK:      .long .Ltmp[[LABEL_UH]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_UH]]
+; CHECK-NEXT: .long 0
+; CHECK:      .long .Ltmp[[LABEL_UW]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_UW]]
+; CHECK-NEXT: .long 0
+; CHECK:      .long .Ltmp[[LABEL_UD]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_UD]]
+; CHECK-NEXT: .long 0
+
+; Function Attrs: nofree nosync nounwind memory(none)
+declare ptr @llvm.bpf.passthrough.p0.p0(i32, ptr) #2
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare void @llvm.dbg.value(metadata, metadata, metadata) #3
+
+attributes #0 = { "btf_ama" }
+attributes #1 = { nofree nounwind "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
+attributes #2 = { nofree nosync nounwind memory(none) }
+attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+
+!llvm.dbg.cu = !{!11}
+!llvm.module.flags = !{!12, !13, !14, !15, !16}
+!llvm.ident = !{!17}
+
+!0 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "t", file: !1, line: 1, size: 128, elements: !2)
+!1 = !DIFile(filename: "some.file", directory: "/some/dir", checksumkind: CSK_MD5, checksum: "2067f770ab52f9042a61e5bf50a913bd")
+!2 = !{!3, !5, !7, !9}
+!3 = !DIDerivedType(tag: DW_TAG_member, name: "ub", scope: !0, file: !1, line: 2, baseType: !4, size: 8)
+!4 = !DIBasicType(name: "unsigned char", size: 8, encoding: DW_ATE_unsigned_char)
+!5 = !DIDerivedType(tag: DW_TAG_member, name: "uh", scope: !0, file: !1, line: 3, baseType: !6, size: 16, offset: 16)
+!6 = !DIBasicType(name: "unsigned short", size: 16, encoding: DW_ATE_unsigned)
+!7 = !DIDerivedType(tag: DW_TAG_member, name: "uw", scope: !0, file: !1, line: 4, baseType: !8, size: 32, offset: 32)
+!8 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
+!9 = !DIDerivedType(tag: DW_TAG_member, name: "ud", scope: !0, file: !1, line: 5, baseType: !10, size: 64, offset: 64)
+!10 = !DIBasicType(name: "unsigned long", size: 64, encoding: DW_ATE_unsigned)
+!11 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1, producer: "clang version 18.0.0 (/home/eddy/work/llvm-project/clang 3810f2eb4382d5e2090ce5cd47f45379cb453c35)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!12 = !{i32 7, !"Dwarf Version", i32 5}
+!13 = !{i32 2, !"Debug Info Version", i32 3}
+!14 = !{i32 1, !"wchar_size", i32 4}
+!15 = !{i32 7, !"frame-pointer", i32 2}
+!16 = !{i32 7, !"debug-info-assignment-tracking", i1 true}
+!17 = !{!"clang version 18.0.0 (/home/eddy/work/llvm-project/clang 3810f2eb4382d5e2090ce5cd47f45379cb453c35)"}
+!18 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 13, type: !19, scopeLine: 13, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !11, retainedNodes: !23)
+!19 = !DISubroutineType(types: !20)
+!20 = !{null, !21, !10}
+!21 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !22, size: 64)
+!22 = !DIDerivedType(tag: DW_TAG_volatile_type, baseType: !0)
+!23 = !{!24, !25}
+!24 = !DILocalVariable(name: "t", arg: 1, scope: !18, file: !1, line: 13, type: !21)
+!25 = !DILocalVariable(name: "v", arg: 2, scope: !18, file: !1, line: 13, type: !10)
+!26 = !DILocation(line: 0, scope: !18)
+!27 = !DILocation(line: 14, column: 11, scope: !18)
+!28 = !DILocation(line: 14, column: 9, scope: !18)
+!29 = !{!30, !31, i64 0}
+!30 = !{!"t", !31, i64 0, !33, i64 2, !34, i64 4, !35, i64 8}
+!31 = !{!"omnipotent char", !32, i64 0}
+!32 = !{!"Simple C/C++ TBAA"}
+!33 = !{!"short", !31, i64 0}
+!34 = !{!"int", !31, i64 0}
+!35 = !{!"long", !31, i64 0}
+!36 = !DILocation(line: 15, column: 11, scope: !18)
+!37 = !DILocation(line: 15, column: 9, scope: !18)
+!38 = !{!30, !33, i64 2}
+!39 = !DILocation(line: 16, column: 11, scope: !18)
+!40 = !DILocation(line: 16, column: 9, scope: !18)
+!41 = !{!30, !34, i64 4}
+!42 = !DILocation(line: 17, column: 9, scope: !18)
+!43 = !{!30, !35, i64 8}
+!44 = !DILocation(line: 18, column: 1, scope: !18)

diff  --git a/llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-2.ll b/llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-2.ll
new file mode 100644
index 00000000000000..0f568507a6e01b
--- /dev/null
+++ b/llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-2.ll
@@ -0,0 +1,196 @@
+; RUN: llc -mtriple=bpf -mcpu=v2 < %s | FileCheck -check-prefixes=CHECK,V2 %s
+; RUN: llc -mtriple=bpf -mcpu=v4 < %s | FileCheck -check-prefixes=CHECK,V4 %s
+
+; Verify that BPFMISimplifyPatchable::checkADDrr correctly rewrites
+; load instructions.
+;
+; Generated from the following source code:
+;   struct t {
+;     unsigned char  ub;
+;     unsigned short uh;
+;     unsigned int   uw;
+;     unsigned long  ud;
+;   } __attribute__((preserve_access_index));
+;
+;   extern void cu(unsigned long);
+;
+;   void bar(volatile struct t *t) {
+;     cu(t->ub);
+;     cu(t->uh);
+;     cu(t->uw);
+;     cu(t->ud);
+;   }
+;
+; Using the following command:
+;   clang -g -O2 -S -emit-llvm --target=bpf t.c -o t.ll
+
+@"llvm.t:0:0$0:0" = external global i64, !llvm.preserve.access.index !0 #0
+@"llvm.t:0:2$0:1" = external global i64, !llvm.preserve.access.index !0 #0
+@"llvm.t:0:4$0:2" = external global i64, !llvm.preserve.access.index !0 #0
+@"llvm.t:0:8$0:3" = external global i64, !llvm.preserve.access.index !0 #0
+
+; Function Attrs: nounwind
+define dso_local void @bar(ptr noundef %t) local_unnamed_addr #1 !dbg !18 {
+entry:
+  call void @llvm.dbg.value(metadata ptr %t, metadata !24, metadata !DIExpression()), !dbg !25
+  %0 = load i64, ptr @"llvm.t:0:0$0:0", align 8
+  %1 = getelementptr i8, ptr %t, i64 %0
+  %2 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 0, ptr %1)
+  %3 = load volatile i8, ptr %2, align 8, !dbg !26, !tbaa !27
+  %conv = zext i8 %3 to i64, !dbg !34
+  tail call void @cu(i64 noundef %conv) #5, !dbg !35
+  %4 = load i64, ptr @"llvm.t:0:2$0:1", align 8
+  %5 = getelementptr i8, ptr %t, i64 %4
+  %6 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 1, ptr %5)
+  %7 = load volatile i16, ptr %6, align 2, !dbg !36, !tbaa !37
+  %conv1 = zext i16 %7 to i64, !dbg !38
+  tail call void @cu(i64 noundef %conv1) #5, !dbg !39
+  %8 = load i64, ptr @"llvm.t:0:4$0:2", align 8
+  %9 = getelementptr i8, ptr %t, i64 %8
+  %10 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 2, ptr %9)
+  %11 = load volatile i32, ptr %10, align 4, !dbg !40, !tbaa !41
+  %conv2 = zext i32 %11 to i64, !dbg !42
+  tail call void @cu(i64 noundef %conv2) #5, !dbg !43
+  %12 = load i64, ptr @"llvm.t:0:8$0:3", align 8
+  %13 = getelementptr i8, ptr %t, i64 %12
+  %14 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 3, ptr %13)
+  %15 = load volatile i64, ptr %14, align 8, !dbg !44, !tbaa !45
+  tail call void @cu(i64 noundef %15) #5, !dbg !46
+  ret void, !dbg !47
+}
+
+; CHECK: bar:
+; CHECK:      prologue_end
+; CHECK-NEXT: .Ltmp[[LABEL_UB:.*]]:
+; CHECK-NEXT: .Ltmp
+; V2-NEXT:        r1 = *(u8 *)(r6 + 0)
+; V4-NEXT:        w1 = *(u8 *)(r6 + 0)
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     call cu
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp[[LABEL_UH:.*]]:
+; CHECK-NEXT: .Ltmp
+; V2-NEXT:        r1 = *(u16 *)(r6 + 2)
+; V4-NEXT:        w1 = *(u16 *)(r6 + 2)
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     call cu
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp[[LABEL_UW:.*]]:
+; CHECK-NEXT: .Ltmp
+; V2-NEXT:        r1 = *(u32 *)(r6 + 4)
+; V4-NEXT:        w1 = *(u32 *)(r6 + 4)
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     call cu
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp[[LABEL_UD:.*]]:
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     r1 = *(u64 *)(r6 + 8)
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     call cu
+
+; CHECK: .section .BTF
+; CHECK: .long [[STR_T:.*]]  # BTF_KIND_STRUCT(id = [[ID:.*]])
+
+; CHECK: .byte   116     # string offset=[[STR_T]]
+; CHECK: .ascii  "0:0"   # string offset=[[STR_UB:.*]]
+; CHECK: .ascii  "0:1"   # string offset=[[STR_UH:.*]]
+; CHECK: .ascii  "0:2"   # string offset=[[STR_UW:.*]]
+; CHECK: .ascii  "0:3"   # string offset=[[STR_UD:.*]]
+
+; CHECK:     # FieldReloc
+; CHECK:      .long .Ltmp[[LABEL_UB]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_UB]]
+; CHECK-NEXT: .long 0
+; CHECK:      .long .Ltmp[[LABEL_UH]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_UH]]
+; CHECK-NEXT: .long 0
+; CHECK:      .long .Ltmp[[LABEL_UW]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_UW]]
+; CHECK-NEXT: .long 0
+; CHECK:      .long .Ltmp[[LABEL_UD]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_UD]]
+; CHECK-NEXT: .long 0
+
+declare !dbg !48 dso_local void @cu(i64 noundef) local_unnamed_addr #2
+
+; Function Attrs: nofree nosync nounwind memory(none)
+declare ptr @llvm.bpf.passthrough.p0.p0(i32, ptr) #3
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare void @llvm.dbg.value(metadata, metadata, metadata) #4
+
+attributes #0 = { "btf_ama" }
+attributes #1 = { nounwind "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
+attributes #2 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
+attributes #3 = { nofree nosync nounwind memory(none) }
+attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #5 = { nounwind }
+
+!llvm.dbg.cu = !{!11}
+!llvm.module.flags = !{!12, !13, !14, !15, !16}
+!llvm.ident = !{!17}
+
+!0 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "t", file: !1, line: 1, size: 128, elements: !2)
+!1 = !DIFile(filename: "some.file", directory: "/some/dir", checksumkind: CSK_MD5, checksum: "d08c6eeba11118106c69a68932003da2")
+!2 = !{!3, !5, !7, !9}
+!3 = !DIDerivedType(tag: DW_TAG_member, name: "ub", scope: !0, file: !1, line: 2, baseType: !4, size: 8)
+!4 = !DIBasicType(name: "unsigned char", size: 8, encoding: DW_ATE_unsigned_char)
+!5 = !DIDerivedType(tag: DW_TAG_member, name: "uh", scope: !0, file: !1, line: 3, baseType: !6, size: 16, offset: 16)
+!6 = !DIBasicType(name: "unsigned short", size: 16, encoding: DW_ATE_unsigned)
+!7 = !DIDerivedType(tag: DW_TAG_member, name: "uw", scope: !0, file: !1, line: 4, baseType: !8, size: 32, offset: 32)
+!8 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
+!9 = !DIDerivedType(tag: DW_TAG_member, name: "ud", scope: !0, file: !1, line: 5, baseType: !10, size: 64, offset: 64)
+!10 = !DIBasicType(name: "unsigned long", size: 64, encoding: DW_ATE_unsigned)
+!11 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1, producer: "clang version 18.0.0 (/home/eddy/work/llvm-project/clang 3810f2eb4382d5e2090ce5cd47f45379cb453c35)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!12 = !{i32 7, !"Dwarf Version", i32 5}
+!13 = !{i32 2, !"Debug Info Version", i32 3}
+!14 = !{i32 1, !"wchar_size", i32 4}
+!15 = !{i32 7, !"frame-pointer", i32 2}
+!16 = !{i32 7, !"debug-info-assignment-tracking", i1 true}
+!17 = !{!"clang version 18.0.0 (/home/eddy/work/llvm-project/clang 3810f2eb4382d5e2090ce5cd47f45379cb453c35)"}
+!18 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 20, type: !19, scopeLine: 20, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !11, retainedNodes: !23)
+!19 = !DISubroutineType(types: !20)
+!20 = !{null, !21}
+!21 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !22, size: 64)
+!22 = !DIDerivedType(tag: DW_TAG_volatile_type, baseType: !0)
+!23 = !{!24}
+!24 = !DILocalVariable(name: "t", arg: 1, scope: !18, file: !1, line: 20, type: !21)
+!25 = !DILocation(line: 0, scope: !18)
+!26 = !DILocation(line: 21, column: 9, scope: !18)
+!27 = !{!28, !29, i64 0}
+!28 = !{!"t", !29, i64 0, !31, i64 2, !32, i64 4, !33, i64 8}
+!29 = !{!"omnipotent char", !30, i64 0}
+!30 = !{!"Simple C/C++ TBAA"}
+!31 = !{!"short", !29, i64 0}
+!32 = !{!"int", !29, i64 0}
+!33 = !{!"long", !29, i64 0}
+!34 = !DILocation(line: 21, column: 6, scope: !18)
+!35 = !DILocation(line: 21, column: 3, scope: !18)
+!36 = !DILocation(line: 22, column: 9, scope: !18)
+!37 = !{!28, !31, i64 2}
+!38 = !DILocation(line: 22, column: 6, scope: !18)
+!39 = !DILocation(line: 22, column: 3, scope: !18)
+!40 = !DILocation(line: 23, column: 9, scope: !18)
+!41 = !{!28, !32, i64 4}
+!42 = !DILocation(line: 23, column: 6, scope: !18)
+!43 = !DILocation(line: 23, column: 3, scope: !18)
+!44 = !DILocation(line: 24, column: 9, scope: !18)
+!45 = !{!28, !33, i64 8}
+!46 = !DILocation(line: 24, column: 3, scope: !18)
+!47 = !DILocation(line: 25, column: 1, scope: !18)
+!48 = !DISubprogram(name: "cu", scope: !1, file: !1, line: 10, type: !49, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !51)
+!49 = !DISubroutineType(types: !50)
+!50 = !{null, !10}
+!51 = !{!52}
+!52 = !DILocalVariable(arg: 1, scope: !48, file: !1, line: 10, type: !10)

diff  --git a/llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-3.ll b/llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-3.ll
new file mode 100644
index 00000000000000..6ea8ede95836ee
--- /dev/null
+++ b/llvm/test/CodeGen/BPF/CORE/offset-reloc-simplify-patchable-3.ll
@@ -0,0 +1,166 @@
+; RUN: llc -mtriple=bpf -mcpu=v4 < %s | FileCheck -check-prefixes=CHECK %s
+
+; Verify that BPFMISimplifyPatchable::checkADDrr correctly rewrites
+; load instructions with sign extension.
+;
+; Generated from the following source code:
+;   struct t {
+;     signed char    sb;
+;     signed short   sh;
+;     signed int     sw;
+;   } __attribute__((preserve_access_index));
+;
+;   extern void cs(signed long);
+;
+;   void buz(volatile struct t *t) {
+;     cs(t->sb);
+;     cs(t->sh);
+;     cs(t->sw);
+;   }
+;
+; Using the following command:
+;   clang -g -O2 -S -emit-llvm --target=bpf t.c -o t.ll
+
+@"llvm.t:0:0$0:0" = external global i64, !llvm.preserve.access.index !0 #0
+@"llvm.t:0:2$0:1" = external global i64, !llvm.preserve.access.index !0 #0
+@"llvm.t:0:4$0:2" = external global i64, !llvm.preserve.access.index !0 #0
+
+; Function Attrs: nounwind
+define dso_local void @buz(ptr noundef %t) local_unnamed_addr #1 !dbg !16 {
+entry:
+  call void @llvm.dbg.value(metadata ptr %t, metadata !22, metadata !DIExpression()), !dbg !23
+  %0 = load i64, ptr @"llvm.t:0:0$0:0", align 8
+  %1 = getelementptr i8, ptr %t, i64 %0
+  %2 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 0, ptr %1)
+  %3 = load volatile i8, ptr %2, align 4, !dbg !24, !tbaa !25
+  %conv = sext i8 %3 to i64, !dbg !31
+  tail call void @cs(i64 noundef %conv) #5, !dbg !32
+  %4 = load i64, ptr @"llvm.t:0:2$0:1", align 8
+  %5 = getelementptr i8, ptr %t, i64 %4
+  %6 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 1, ptr %5)
+  %7 = load volatile i16, ptr %6, align 2, !dbg !33, !tbaa !34
+  %conv1 = sext i16 %7 to i64, !dbg !35
+  tail call void @cs(i64 noundef %conv1) #5, !dbg !36
+  %8 = load i64, ptr @"llvm.t:0:4$0:2", align 8
+  %9 = getelementptr i8, ptr %t, i64 %8
+  %10 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 2, ptr %9)
+  %11 = load volatile i32, ptr %10, align 4, !dbg !37, !tbaa !38
+  %conv2 = sext i32 %11 to i64, !dbg !39
+  tail call void @cs(i64 noundef %conv2) #5, !dbg !40
+  ret void, !dbg !41
+}
+
+; CHECK: buz:
+; CHECK:      prologue_end
+; CHECK-NEXT: .Ltmp[[LABEL_SB:.*]]:
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     r1 = *(s8 *)(r6 + 0)
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     call cs
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp[[LABEL_SH:.*]]:
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     r1 = *(s16 *)(r6 + 2)
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     call cs
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp[[LABEL_SW:.*]]:
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     r1 = *(s32 *)(r6 + 4)
+; CHECK-NEXT:     .loc
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT:     call cs
+
+; CHECK: .section .BTF
+; CHECK: .long [[T:.*]]  # BTF_KIND_STRUCT(id = [[ID:.*]])
+
+; CHECK: .byte   116     # string offset=[[T]]
+; CHECK: .ascii  "0:0"   # string offset=[[STR_SB:.*]]
+; CHECK: .ascii  "0:1"   # string offset=[[STR_SH:.*]]
+; CHECK: .ascii  "0:2"   # string offset=[[STR_SW:.*]]
+
+; CHECK:     # FieldReloc
+; CHECK:      .long .Ltmp[[LABEL_SB]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_SB]]
+; CHECK-NEXT: .long 0
+; CHECK:      .long .Ltmp[[LABEL_SH]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_SH]]
+; CHECK-NEXT: .long 0
+; CHECK:      .long .Ltmp[[LABEL_SW]]
+; CHECK-NEXT: .long [[ID]]
+; CHECK-NEXT: .long [[STR_SW]]
+; CHECK-NEXT: .long 0
+
+declare !dbg !42 dso_local void @cs(i64 noundef) local_unnamed_addr #2
+
+; Function Attrs: nofree nosync nounwind memory(none)
+declare ptr @llvm.bpf.passthrough.p0.p0(i32, ptr) #3
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare void @llvm.dbg.value(metadata, metadata, metadata) #4
+
+attributes #0 = { "btf_ama" }
+attributes #1 = { nounwind "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
+attributes #2 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
+attributes #3 = { nofree nosync nounwind memory(none) }
+attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #5 = { nounwind }
+
+!llvm.dbg.cu = !{!9}
+!llvm.module.flags = !{!10, !11, !12, !13, !14}
+!llvm.ident = !{!15}
+
+!0 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "t", file: !1, line: 1, size: 64, elements: !2)
+!1 = !DIFile(filename: "some.file", directory: "/some/dir", checksumkind: CSK_MD5, checksum: "2316ba0d3e8def5d297ad400e78b1782")
+!2 = !{!3, !5, !7}
+!3 = !DIDerivedType(tag: DW_TAG_member, name: "sb", scope: !0, file: !1, line: 6, baseType: !4, size: 8)
+!4 = !DIBasicType(name: "signed char", size: 8, encoding: DW_ATE_signed_char)
+!5 = !DIDerivedType(tag: DW_TAG_member, name: "sh", scope: !0, file: !1, line: 7, baseType: !6, size: 16, offset: 16)
+!6 = !DIBasicType(name: "short", size: 16, encoding: DW_ATE_signed)
+!7 = !DIDerivedType(tag: DW_TAG_member, name: "sw", scope: !0, file: !1, line: 8, baseType: !8, size: 32, offset: 32)
+!8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!9 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1, producer: "clang version 18.0.0 (/home/eddy/work/llvm-project/clang 3810f2eb4382d5e2090ce5cd47f45379cb453c35)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!10 = !{i32 7, !"Dwarf Version", i32 5}
+!11 = !{i32 2, !"Debug Info Version", i32 3}
+!12 = !{i32 1, !"wchar_size", i32 4}
+!13 = !{i32 7, !"frame-pointer", i32 2}
+!14 = !{i32 7, !"debug-info-assignment-tracking", i1 true}
+!15 = !{!"clang version 18.0.0 (/home/eddy/work/llvm-project/clang 3810f2eb4382d5e2090ce5cd47f45379cb453c35)"}
+!16 = distinct !DISubprogram(name: "buz", scope: !1, file: !1, line: 27, type: !17, scopeLine: 27, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !9, retainedNodes: !21)
+!17 = !DISubroutineType(types: !18)
+!18 = !{null, !19}
+!19 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !20, size: 64)
+!20 = !DIDerivedType(tag: DW_TAG_volatile_type, baseType: !0)
+!21 = !{!22}
+!22 = !DILocalVariable(name: "t", arg: 1, scope: !16, file: !1, line: 27, type: !19)
+!23 = !DILocation(line: 0, scope: !16)
+!24 = !DILocation(line: 28, column: 9, scope: !16)
+!25 = !{!26, !27, i64 0}
+!26 = !{!"t", !27, i64 0, !29, i64 2, !30, i64 4}
+!27 = !{!"omnipotent char", !28, i64 0}
+!28 = !{!"Simple C/C++ TBAA"}
+!29 = !{!"short", !27, i64 0}
+!30 = !{!"int", !27, i64 0}
+!31 = !DILocation(line: 28, column: 6, scope: !16)
+!32 = !DILocation(line: 28, column: 3, scope: !16)
+!33 = !DILocation(line: 29, column: 9, scope: !16)
+!34 = !{!26, !29, i64 2}
+!35 = !DILocation(line: 29, column: 6, scope: !16)
+!36 = !DILocation(line: 29, column: 3, scope: !16)
+!37 = !DILocation(line: 30, column: 9, scope: !16)
+!38 = !{!26, !30, i64 4}
+!39 = !DILocation(line: 30, column: 6, scope: !16)
+!40 = !DILocation(line: 30, column: 3, scope: !16)
+!41 = !DILocation(line: 31, column: 1, scope: !16)
+!42 = !DISubprogram(name: "cs", scope: !1, file: !1, line: 11, type: !43, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !46)
+!43 = !DISubroutineType(types: !44)
+!44 = !{null, !45}
+!45 = !DIBasicType(name: "long", size: 64, encoding: DW_ATE_signed)
+!46 = !{!47}
+!47 = !DILocalVariable(arg: 1, scope: !42, file: !1, line: 11, type: !45)


        


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