[llvm] f337a77 - AMDGPU: Replace rounding libcalls with intrinsics
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 14 15:36:06 PDT 2023
Author: Matt Arsenault
Date: 2023-08-14T18:36:01-04:00
New Revision: f337a77c99aa31b37c60dd2ecbd96f8317426fad
URL: https://github.com/llvm/llvm-project/commit/f337a77c99aa31b37c60dd2ecbd96f8317426fad
DIFF: https://github.com/llvm/llvm-project/commit/f337a77c99aa31b37c60dd2ecbd96f8317426fad.diff
LOG: AMDGPU: Replace rounding libcalls with intrinsics
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ceil.ll
llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-floor.ll
llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rint.ll
llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-round.ll
llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-trunc.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp b/llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
index 1ca4559f100823..95bd47f8aeb7a2 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
@@ -585,8 +585,7 @@ bool AMDGPULibCalls::fold(CallInst *CI) {
// Specialized optimizations for each function call.
//
- // TODO: Handle other simple intrinsic wrappers. Sqrt, ldexp, log, rounding
- // intrinsics.
+ // TODO: Handle other simple intrinsic wrappers. Sqrt, ldexp log.
//
// TODO: Handle native functions
switch (FInfo.getId()) {
@@ -618,6 +617,21 @@ bool AMDGPULibCalls::fold(CallInst *CI) {
case AMDGPULibFunc::EI_COPYSIGN:
return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::copysign, true,
true, true);
+ case AMDGPULibFunc::EI_FLOOR:
+ return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::floor, true,
+ true);
+ case AMDGPULibFunc::EI_CEIL:
+ return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::ceil, true,
+ true);
+ case AMDGPULibFunc::EI_TRUNC:
+ return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::trunc, true,
+ true);
+ case AMDGPULibFunc::EI_RINT:
+ return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::rint, true,
+ true);
+ case AMDGPULibFunc::EI_ROUND:
+ return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::round, true,
+ true);
case AMDGPULibFunc::EI_POW:
case AMDGPULibFunc::EI_POWR:
case AMDGPULibFunc::EI_POWN:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ceil.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ceil.ll
index df04b848f70b83..eac3f4f1dbcb3e 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ceil.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ceil.ll
@@ -27,7 +27,7 @@ declare <16 x half> @_Z4ceilDv16_Dh(<16 x half>)
define float @test_ceil_f32(float %arg) {
; CHECK-LABEL: define float @test_ceil_f32
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call float @_Z4ceilf(float [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call float @llvm.ceil.f32(float [[ARG]])
; CHECK-NEXT: ret float [[CEIL]]
;
%ceil = tail call float @_Z4ceilf(float %arg)
@@ -37,7 +37,7 @@ define float @test_ceil_f32(float %arg) {
define <2 x float> @test_ceil_v2f32(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_ceil_v2f32
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <2 x float> @_Z4ceilDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <2 x float> @llvm.ceil.v2f32(<2 x float> [[ARG]])
; CHECK-NEXT: ret <2 x float> [[CEIL]]
;
%ceil = tail call <2 x float> @_Z4ceilDv2_f(<2 x float> %arg)
@@ -47,7 +47,7 @@ define <2 x float> @test_ceil_v2f32(<2 x float> %arg) {
define <3 x float> @test_ceil_v3f32(<3 x float> %arg) {
; CHECK-LABEL: define <3 x float> @test_ceil_v3f32
; CHECK-SAME: (<3 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <3 x float> @_Z4ceilDv3_f(<3 x float> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <3 x float> @llvm.ceil.v3f32(<3 x float> [[ARG]])
; CHECK-NEXT: ret <3 x float> [[CEIL]]
;
%ceil = tail call <3 x float> @_Z4ceilDv3_f(<3 x float> %arg)
@@ -57,7 +57,7 @@ define <3 x float> @test_ceil_v3f32(<3 x float> %arg) {
define <4 x float> @test_ceil_v4f32(<4 x float> %arg) {
; CHECK-LABEL: define <4 x float> @test_ceil_v4f32
; CHECK-SAME: (<4 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <4 x float> @_Z4ceilDv4_f(<4 x float> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <4 x float> @llvm.ceil.v4f32(<4 x float> [[ARG]])
; CHECK-NEXT: ret <4 x float> [[CEIL]]
;
%ceil = tail call <4 x float> @_Z4ceilDv4_f(<4 x float> %arg)
@@ -67,7 +67,7 @@ define <4 x float> @test_ceil_v4f32(<4 x float> %arg) {
define <8 x float> @test_ceil_v8f32(<8 x float> %arg) {
; CHECK-LABEL: define <8 x float> @test_ceil_v8f32
; CHECK-SAME: (<8 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <8 x float> @_Z4ceilDv8_f(<8 x float> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <8 x float> @llvm.ceil.v8f32(<8 x float> [[ARG]])
; CHECK-NEXT: ret <8 x float> [[CEIL]]
;
%ceil = tail call <8 x float> @_Z4ceilDv8_f(<8 x float> %arg)
@@ -77,7 +77,7 @@ define <8 x float> @test_ceil_v8f32(<8 x float> %arg) {
define <16 x float> @test_ceil_v16f32(<16 x float> %arg) {
; CHECK-LABEL: define <16 x float> @test_ceil_v16f32
; CHECK-SAME: (<16 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <16 x float> @_Z4ceilDv16_f(<16 x float> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <16 x float> @llvm.ceil.v16f32(<16 x float> [[ARG]])
; CHECK-NEXT: ret <16 x float> [[CEIL]]
;
%ceil = tail call <16 x float> @_Z4ceilDv16_f(<16 x float> %arg)
@@ -87,7 +87,7 @@ define <16 x float> @test_ceil_v16f32(<16 x float> %arg) {
define double @test_ceil_f64(double %arg) {
; CHECK-LABEL: define double @test_ceil_f64
; CHECK-SAME: (double [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call double @_Z4ceild(double [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call double @llvm.ceil.f64(double [[ARG]])
; CHECK-NEXT: ret double [[CEIL]]
;
%ceil = tail call double @_Z4ceild(double %arg)
@@ -97,7 +97,7 @@ define double @test_ceil_f64(double %arg) {
define <2 x double> @test_ceil_v2f64(<2 x double> %arg) {
; CHECK-LABEL: define <2 x double> @test_ceil_v2f64
; CHECK-SAME: (<2 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <2 x double> @_Z4ceilDv2_d(<2 x double> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <2 x double> @llvm.ceil.v2f64(<2 x double> [[ARG]])
; CHECK-NEXT: ret <2 x double> [[CEIL]]
;
%ceil = tail call <2 x double> @_Z4ceilDv2_d(<2 x double> %arg)
@@ -107,7 +107,7 @@ define <2 x double> @test_ceil_v2f64(<2 x double> %arg) {
define <3 x double> @test_ceil_v3f64(<3 x double> %arg) {
; CHECK-LABEL: define <3 x double> @test_ceil_v3f64
; CHECK-SAME: (<3 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <3 x double> @_Z4ceilDv3_d(<3 x double> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <3 x double> @llvm.ceil.v3f64(<3 x double> [[ARG]])
; CHECK-NEXT: ret <3 x double> [[CEIL]]
;
%ceil = tail call <3 x double> @_Z4ceilDv3_d(<3 x double> %arg)
@@ -117,7 +117,7 @@ define <3 x double> @test_ceil_v3f64(<3 x double> %arg) {
define <4 x double> @test_ceil_v4f64(<4 x double> %arg) {
; CHECK-LABEL: define <4 x double> @test_ceil_v4f64
; CHECK-SAME: (<4 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <4 x double> @_Z4ceilDv4_d(<4 x double> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <4 x double> @llvm.ceil.v4f64(<4 x double> [[ARG]])
; CHECK-NEXT: ret <4 x double> [[CEIL]]
;
%ceil = tail call <4 x double> @_Z4ceilDv4_d(<4 x double> %arg)
@@ -127,7 +127,7 @@ define <4 x double> @test_ceil_v4f64(<4 x double> %arg) {
define <8 x double> @test_ceil_v8f64(<8 x double> %arg) {
; CHECK-LABEL: define <8 x double> @test_ceil_v8f64
; CHECK-SAME: (<8 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <8 x double> @_Z4ceilDv8_d(<8 x double> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <8 x double> @llvm.ceil.v8f64(<8 x double> [[ARG]])
; CHECK-NEXT: ret <8 x double> [[CEIL]]
;
%ceil = tail call <8 x double> @_Z4ceilDv8_d(<8 x double> %arg)
@@ -137,7 +137,7 @@ define <8 x double> @test_ceil_v8f64(<8 x double> %arg) {
define <16 x double> @test_ceil_v16f64(<16 x double> %arg) {
; CHECK-LABEL: define <16 x double> @test_ceil_v16f64
; CHECK-SAME: (<16 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <16 x double> @_Z4ceilDv16_d(<16 x double> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <16 x double> @llvm.ceil.v16f64(<16 x double> [[ARG]])
; CHECK-NEXT: ret <16 x double> [[CEIL]]
;
%ceil = tail call <16 x double> @_Z4ceilDv16_d(<16 x double> %arg)
@@ -147,7 +147,7 @@ define <16 x double> @test_ceil_v16f64(<16 x double> %arg) {
define half @test_ceil_f16(half %arg) {
; CHECK-LABEL: define half @test_ceil_f16
; CHECK-SAME: (half [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call half @_Z4ceilDh(half [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call half @llvm.ceil.f16(half [[ARG]])
; CHECK-NEXT: ret half [[CEIL]]
;
%ceil = tail call half @_Z4ceilDh(half %arg)
@@ -157,7 +157,7 @@ define half @test_ceil_f16(half %arg) {
define <2 x half> @test_ceil_v2f16(<2 x half> %arg) {
; CHECK-LABEL: define <2 x half> @test_ceil_v2f16
; CHECK-SAME: (<2 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <2 x half> @_Z4ceilDv2_Dh(<2 x half> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <2 x half> @llvm.ceil.v2f16(<2 x half> [[ARG]])
; CHECK-NEXT: ret <2 x half> [[CEIL]]
;
%ceil = tail call <2 x half> @_Z4ceilDv2_Dh(<2 x half> %arg)
@@ -167,7 +167,7 @@ define <2 x half> @test_ceil_v2f16(<2 x half> %arg) {
define <3 x half> @test_ceil_v3f16(<3 x half> %arg) {
; CHECK-LABEL: define <3 x half> @test_ceil_v3f16
; CHECK-SAME: (<3 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <3 x half> @_Z4ceilDv3_Dh(<3 x half> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <3 x half> @llvm.ceil.v3f16(<3 x half> [[ARG]])
; CHECK-NEXT: ret <3 x half> [[CEIL]]
;
%ceil = tail call <3 x half> @_Z4ceilDv3_Dh(<3 x half> %arg)
@@ -177,7 +177,7 @@ define <3 x half> @test_ceil_v3f16(<3 x half> %arg) {
define <4 x half> @test_ceil_v4f16(<4 x half> %arg) {
; CHECK-LABEL: define <4 x half> @test_ceil_v4f16
; CHECK-SAME: (<4 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <4 x half> @_Z4ceilDv4_Dh(<4 x half> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <4 x half> @llvm.ceil.v4f16(<4 x half> [[ARG]])
; CHECK-NEXT: ret <4 x half> [[CEIL]]
;
%ceil = tail call <4 x half> @_Z4ceilDv4_Dh(<4 x half> %arg)
@@ -187,7 +187,7 @@ define <4 x half> @test_ceil_v4f16(<4 x half> %arg) {
define <8 x half> @test_ceil_v8f16(<8 x half> %arg) {
; CHECK-LABEL: define <8 x half> @test_ceil_v8f16
; CHECK-SAME: (<8 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <8 x half> @_Z4ceilDv8_Dh(<8 x half> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <8 x half> @llvm.ceil.v8f16(<8 x half> [[ARG]])
; CHECK-NEXT: ret <8 x half> [[CEIL]]
;
%ceil = tail call <8 x half> @_Z4ceilDv8_Dh(<8 x half> %arg)
@@ -197,7 +197,7 @@ define <8 x half> @test_ceil_v8f16(<8 x half> %arg) {
define <16 x half> @test_ceil_v16f16(<16 x half> %arg) {
; CHECK-LABEL: define <16 x half> @test_ceil_v16f16
; CHECK-SAME: (<16 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <16 x half> @_Z4ceilDv16_Dh(<16 x half> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <16 x half> @llvm.ceil.v16f16(<16 x half> [[ARG]])
; CHECK-NEXT: ret <16 x half> [[CEIL]]
;
%ceil = tail call <16 x half> @_Z4ceilDv16_Dh(<16 x half> %arg)
@@ -207,7 +207,7 @@ define <16 x half> @test_ceil_v16f16(<16 x half> %arg) {
define float @test_ceil_f32_nobuiltin_callsite(float %arg) {
; CHECK-LABEL: define float @test_ceil_f32_nobuiltin_callsite
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call float @_Z4ceilf(float [[ARG]]) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT: [[CEIL:%.*]] = tail call float @_Z4ceilf(float [[ARG]]) #[[ATTR4:[0-9]+]]
; CHECK-NEXT: ret float [[CEIL]]
;
%ceil = tail call float @_Z4ceilf(float %arg) #0
@@ -217,7 +217,7 @@ define float @test_ceil_f32_nobuiltin_callsite(float %arg) {
define <2 x float> @test_ceil_v2f32_nobuiltin_callsite(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_ceil_v2f32_nobuiltin_callsite
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <2 x float> @_Z4ceilDv2_f(<2 x float> [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <2 x float> @_Z4ceilDv2_f(<2 x float> [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret <2 x float> [[CEIL]]
;
%ceil = tail call <2 x float> @_Z4ceilDv2_f(<2 x float> %arg) #0
@@ -228,7 +228,7 @@ define <2 x float> @test_ceil_v2f32_nobuiltin_callsite(<2 x float> %arg) {
define float @test_ceil_f32_nobuiltins(float %arg) #1 {
; CHECK-LABEL: define float @test_ceil_f32_nobuiltins
; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call float @_Z4ceilf(float [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[CEIL:%.*]] = tail call float @_Z4ceilf(float [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret float [[CEIL]]
;
%ceil = tail call float @_Z4ceilf(float %arg) #0
@@ -238,7 +238,7 @@ define float @test_ceil_f32_nobuiltins(float %arg) #1 {
define <2 x float> @test_ceil_v2f32_nobuiltins(<2 x float> %arg) #1 {
; CHECK-LABEL: define <2 x float> @test_ceil_v2f32_nobuiltins
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call <2 x float> @_Z4ceilDv2_f(<2 x float> [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[CEIL:%.*]] = tail call <2 x float> @_Z4ceilDv2_f(<2 x float> [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret <2 x float> [[CEIL]]
;
%ceil = tail call <2 x float> @_Z4ceilDv2_f(<2 x float> %arg) #0
@@ -248,7 +248,7 @@ define <2 x float> @test_ceil_v2f32_nobuiltins(<2 x float> %arg) #1 {
define float @test_ceil_f32_preserve_flags(float %arg) {
; CHECK-LABEL: define float @test_ceil_f32_preserve_flags
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call nnan ninf float @_Z4ceilf(float [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call nnan ninf float @llvm.ceil.f32(float [[ARG]])
; CHECK-NEXT: ret float [[CEIL]]
;
%ceil = tail call nnan ninf float @_Z4ceilf(float %arg)
@@ -258,7 +258,7 @@ define float @test_ceil_f32_preserve_flags(float %arg) {
define <2 x float> @test_ceil_v2f32_preserve_flags(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_ceil_v2f32_preserve_flags
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call nnan nsz contract <2 x float> @_Z4ceilDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT: [[CEIL:%.*]] = tail call nnan nsz contract <2 x float> @llvm.ceil.v2f32(<2 x float> [[ARG]])
; CHECK-NEXT: ret <2 x float> [[CEIL]]
;
%ceil = tail call contract nsz nnan <2 x float> @_Z4ceilDv2_f(<2 x float> %arg)
@@ -268,7 +268,7 @@ define <2 x float> @test_ceil_v2f32_preserve_flags(<2 x float> %arg) {
define float @test_ceil_f32_preserve_flags_md(float %arg) {
; CHECK-LABEL: define float @test_ceil_f32_preserve_flags_md
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call nnan ninf float @_Z4ceilf(float [[ARG]]), !foo !0
+; CHECK-NEXT: [[CEIL:%.*]] = tail call nnan ninf float @llvm.ceil.f32(float [[ARG]]), !foo !0
; CHECK-NEXT: ret float [[CEIL]]
;
%ceil = tail call nnan ninf float @_Z4ceilf(float %arg), !foo !0
@@ -278,7 +278,7 @@ define float @test_ceil_f32_preserve_flags_md(float %arg) {
define <2 x float> @test_ceil_v2f32_preserve_flags_md(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_ceil_v2f32_preserve_flags_md
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[CEIL:%.*]] = tail call nnan nsz contract <2 x float> @_Z4ceilDv2_f(<2 x float> [[ARG]]), !foo !0
+; CHECK-NEXT: [[CEIL:%.*]] = tail call nnan nsz contract <2 x float> @llvm.ceil.v2f32(<2 x float> [[ARG]]), !foo !0
; CHECK-NEXT: ret <2 x float> [[CEIL]]
;
%ceil = tail call contract nsz nnan <2 x float> @_Z4ceilDv2_f(<2 x float> %arg), !foo !0
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-floor.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-floor.ll
index 47ac99f800ac19..ed4c49fb0b13f5 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-floor.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-floor.ll
@@ -27,7 +27,7 @@ declare <16 x half> @_Z5floorDv16_Dh(<16 x half>)
define float @test_rint_f32(float %arg) {
; CHECK-LABEL: define float @test_rint_f32
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5floorf(float [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @llvm.floor.f32(float [[ARG]])
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z5floorf(float %arg)
@@ -37,7 +37,7 @@ define float @test_rint_f32(float %arg) {
define <2 x float> @test_rint_v2f32(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5floorDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @llvm.floor.v2f32(<2 x float> [[ARG]])
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z5floorDv2_f(<2 x float> %arg)
@@ -47,7 +47,7 @@ define <2 x float> @test_rint_v2f32(<2 x float> %arg) {
define <3 x float> @test_rint_v3f32(<3 x float> %arg) {
; CHECK-LABEL: define <3 x float> @test_rint_v3f32
; CHECK-SAME: (<3 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x float> @_Z5floorDv3_f(<3 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x float> @llvm.floor.v3f32(<3 x float> [[ARG]])
; CHECK-NEXT: ret <3 x float> [[RINT]]
;
%rint = tail call <3 x float> @_Z5floorDv3_f(<3 x float> %arg)
@@ -57,7 +57,7 @@ define <3 x float> @test_rint_v3f32(<3 x float> %arg) {
define <4 x float> @test_rint_v4f32(<4 x float> %arg) {
; CHECK-LABEL: define <4 x float> @test_rint_v4f32
; CHECK-SAME: (<4 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x float> @_Z5floorDv4_f(<4 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x float> @llvm.floor.v4f32(<4 x float> [[ARG]])
; CHECK-NEXT: ret <4 x float> [[RINT]]
;
%rint = tail call <4 x float> @_Z5floorDv4_f(<4 x float> %arg)
@@ -67,7 +67,7 @@ define <4 x float> @test_rint_v4f32(<4 x float> %arg) {
define <8 x float> @test_rint_v8f32(<8 x float> %arg) {
; CHECK-LABEL: define <8 x float> @test_rint_v8f32
; CHECK-SAME: (<8 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x float> @_Z5floorDv8_f(<8 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x float> @llvm.floor.v8f32(<8 x float> [[ARG]])
; CHECK-NEXT: ret <8 x float> [[RINT]]
;
%rint = tail call <8 x float> @_Z5floorDv8_f(<8 x float> %arg)
@@ -77,7 +77,7 @@ define <8 x float> @test_rint_v8f32(<8 x float> %arg) {
define <16 x float> @test_rint_v16f32(<16 x float> %arg) {
; CHECK-LABEL: define <16 x float> @test_rint_v16f32
; CHECK-SAME: (<16 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x float> @_Z5floorDv16_f(<16 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x float> @llvm.floor.v16f32(<16 x float> [[ARG]])
; CHECK-NEXT: ret <16 x float> [[RINT]]
;
%rint = tail call <16 x float> @_Z5floorDv16_f(<16 x float> %arg)
@@ -87,7 +87,7 @@ define <16 x float> @test_rint_v16f32(<16 x float> %arg) {
define double @test_rint_f64(double %arg) {
; CHECK-LABEL: define double @test_rint_f64
; CHECK-SAME: (double [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call double @_Z5floord(double [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call double @llvm.floor.f64(double [[ARG]])
; CHECK-NEXT: ret double [[RINT]]
;
%rint = tail call double @_Z5floord(double %arg)
@@ -97,7 +97,7 @@ define double @test_rint_f64(double %arg) {
define <2 x double> @test_rint_v2f64(<2 x double> %arg) {
; CHECK-LABEL: define <2 x double> @test_rint_v2f64
; CHECK-SAME: (<2 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x double> @_Z5floorDv2_d(<2 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x double> @llvm.floor.v2f64(<2 x double> [[ARG]])
; CHECK-NEXT: ret <2 x double> [[RINT]]
;
%rint = tail call <2 x double> @_Z5floorDv2_d(<2 x double> %arg)
@@ -107,7 +107,7 @@ define <2 x double> @test_rint_v2f64(<2 x double> %arg) {
define <3 x double> @test_rint_v3f64(<3 x double> %arg) {
; CHECK-LABEL: define <3 x double> @test_rint_v3f64
; CHECK-SAME: (<3 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x double> @_Z5floorDv3_d(<3 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x double> @llvm.floor.v3f64(<3 x double> [[ARG]])
; CHECK-NEXT: ret <3 x double> [[RINT]]
;
%rint = tail call <3 x double> @_Z5floorDv3_d(<3 x double> %arg)
@@ -117,7 +117,7 @@ define <3 x double> @test_rint_v3f64(<3 x double> %arg) {
define <4 x double> @test_rint_v4f64(<4 x double> %arg) {
; CHECK-LABEL: define <4 x double> @test_rint_v4f64
; CHECK-SAME: (<4 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x double> @_Z5floorDv4_d(<4 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x double> @llvm.floor.v4f64(<4 x double> [[ARG]])
; CHECK-NEXT: ret <4 x double> [[RINT]]
;
%rint = tail call <4 x double> @_Z5floorDv4_d(<4 x double> %arg)
@@ -127,7 +127,7 @@ define <4 x double> @test_rint_v4f64(<4 x double> %arg) {
define <8 x double> @test_rint_v8f64(<8 x double> %arg) {
; CHECK-LABEL: define <8 x double> @test_rint_v8f64
; CHECK-SAME: (<8 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x double> @_Z5floorDv8_d(<8 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x double> @llvm.floor.v8f64(<8 x double> [[ARG]])
; CHECK-NEXT: ret <8 x double> [[RINT]]
;
%rint = tail call <8 x double> @_Z5floorDv8_d(<8 x double> %arg)
@@ -137,7 +137,7 @@ define <8 x double> @test_rint_v8f64(<8 x double> %arg) {
define <16 x double> @test_rint_v16f64(<16 x double> %arg) {
; CHECK-LABEL: define <16 x double> @test_rint_v16f64
; CHECK-SAME: (<16 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x double> @_Z5floorDv16_d(<16 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x double> @llvm.floor.v16f64(<16 x double> [[ARG]])
; CHECK-NEXT: ret <16 x double> [[RINT]]
;
%rint = tail call <16 x double> @_Z5floorDv16_d(<16 x double> %arg)
@@ -147,7 +147,7 @@ define <16 x double> @test_rint_v16f64(<16 x double> %arg) {
define half @test_rint_f16(half %arg) {
; CHECK-LABEL: define half @test_rint_f16
; CHECK-SAME: (half [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call half @_Z5floorDh(half [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call half @llvm.floor.f16(half [[ARG]])
; CHECK-NEXT: ret half [[RINT]]
;
%rint = tail call half @_Z5floorDh(half %arg)
@@ -157,7 +157,7 @@ define half @test_rint_f16(half %arg) {
define <2 x half> @test_rint_v2f16(<2 x half> %arg) {
; CHECK-LABEL: define <2 x half> @test_rint_v2f16
; CHECK-SAME: (<2 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x half> @_Z5floorDv2_Dh(<2 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x half> @llvm.floor.v2f16(<2 x half> [[ARG]])
; CHECK-NEXT: ret <2 x half> [[RINT]]
;
%rint = tail call <2 x half> @_Z5floorDv2_Dh(<2 x half> %arg)
@@ -167,7 +167,7 @@ define <2 x half> @test_rint_v2f16(<2 x half> %arg) {
define <3 x half> @test_rint_v3f16(<3 x half> %arg) {
; CHECK-LABEL: define <3 x half> @test_rint_v3f16
; CHECK-SAME: (<3 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x half> @_Z5floorDv3_Dh(<3 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x half> @llvm.floor.v3f16(<3 x half> [[ARG]])
; CHECK-NEXT: ret <3 x half> [[RINT]]
;
%rint = tail call <3 x half> @_Z5floorDv3_Dh(<3 x half> %arg)
@@ -177,7 +177,7 @@ define <3 x half> @test_rint_v3f16(<3 x half> %arg) {
define <4 x half> @test_rint_v4f16(<4 x half> %arg) {
; CHECK-LABEL: define <4 x half> @test_rint_v4f16
; CHECK-SAME: (<4 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x half> @_Z5floorDv4_Dh(<4 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x half> @llvm.floor.v4f16(<4 x half> [[ARG]])
; CHECK-NEXT: ret <4 x half> [[RINT]]
;
%rint = tail call <4 x half> @_Z5floorDv4_Dh(<4 x half> %arg)
@@ -187,7 +187,7 @@ define <4 x half> @test_rint_v4f16(<4 x half> %arg) {
define <8 x half> @test_rint_v8f16(<8 x half> %arg) {
; CHECK-LABEL: define <8 x half> @test_rint_v8f16
; CHECK-SAME: (<8 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x half> @_Z5floorDv8_Dh(<8 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x half> @llvm.floor.v8f16(<8 x half> [[ARG]])
; CHECK-NEXT: ret <8 x half> [[RINT]]
;
%rint = tail call <8 x half> @_Z5floorDv8_Dh(<8 x half> %arg)
@@ -197,7 +197,7 @@ define <8 x half> @test_rint_v8f16(<8 x half> %arg) {
define <16 x half> @test_rint_v16f16(<16 x half> %arg) {
; CHECK-LABEL: define <16 x half> @test_rint_v16f16
; CHECK-SAME: (<16 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x half> @_Z5floorDv16_Dh(<16 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x half> @llvm.floor.v16f16(<16 x half> [[ARG]])
; CHECK-NEXT: ret <16 x half> [[RINT]]
;
%rint = tail call <16 x half> @_Z5floorDv16_Dh(<16 x half> %arg)
@@ -207,7 +207,7 @@ define <16 x half> @test_rint_v16f16(<16 x half> %arg) {
define float @test_rint_f32_nobuiltin_callsite(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_nobuiltin_callsite
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5floorf(float [[ARG]]) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5floorf(float [[ARG]]) #[[ATTR4:[0-9]+]]
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z5floorf(float %arg) #0
@@ -217,7 +217,7 @@ define float @test_rint_f32_nobuiltin_callsite(float %arg) {
define <2 x float> @test_rint_v2f32_nobuiltin_callsite(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_nobuiltin_callsite
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5floorDv2_f(<2 x float> [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5floorDv2_f(<2 x float> [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z5floorDv2_f(<2 x float> %arg) #0
@@ -228,7 +228,7 @@ define <2 x float> @test_rint_v2f32_nobuiltin_callsite(<2 x float> %arg) {
define float @test_rint_f32_nobuiltins(float %arg) #1 {
; CHECK-LABEL: define float @test_rint_f32_nobuiltins
; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5floorf(float [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5floorf(float [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z5floorf(float %arg) #0
@@ -238,7 +238,7 @@ define float @test_rint_f32_nobuiltins(float %arg) #1 {
define <2 x float> @test_rint_v2f32_nobuiltins(<2 x float> %arg) #1 {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_nobuiltins
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5floorDv2_f(<2 x float> [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5floorDv2_f(<2 x float> [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z5floorDv2_f(<2 x float> %arg) #0
@@ -248,7 +248,7 @@ define <2 x float> @test_rint_v2f32_nobuiltins(<2 x float> %arg) #1 {
define float @test_rint_f32_preserve_flags(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_preserve_flags
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @_Z5floorf(float [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @llvm.floor.f32(float [[ARG]])
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call nnan ninf float @_Z5floorf(float %arg)
@@ -258,7 +258,7 @@ define float @test_rint_f32_preserve_flags(float %arg) {
define <2 x float> @test_rint_v2f32_preserve_flags(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_preserve_flags
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @_Z5floorDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @llvm.floor.v2f32(<2 x float> [[ARG]])
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call contract nsz nnan <2 x float> @_Z5floorDv2_f(<2 x float> %arg)
@@ -268,7 +268,7 @@ define <2 x float> @test_rint_v2f32_preserve_flags(<2 x float> %arg) {
define float @test_rint_f32_preserve_flags_md(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_preserve_flags_md
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @_Z5floorf(float [[ARG]]), !foo !0
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @llvm.floor.f32(float [[ARG]]), !foo !0
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call nnan ninf float @_Z5floorf(float %arg), !foo !0
@@ -278,7 +278,7 @@ define float @test_rint_f32_preserve_flags_md(float %arg) {
define <2 x float> @test_rint_v2f32_preserve_flags_md(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_preserve_flags_md
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @_Z5floorDv2_f(<2 x float> [[ARG]]), !foo !0
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @llvm.floor.v2f32(<2 x float> [[ARG]]), !foo !0
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call contract nsz nnan <2 x float> @_Z5floorDv2_f(<2 x float> %arg), !foo !0
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rint.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rint.ll
index 21572e015d36ef..5843c0e5506ae6 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rint.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rint.ll
@@ -27,7 +27,7 @@ declare <16 x half> @_Z4rintDv16_Dh(<16 x half>)
define float @test_rint_f32(float %arg) {
; CHECK-LABEL: define float @test_rint_f32
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z4rintf(float [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @llvm.rint.f32(float [[ARG]])
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z4rintf(float %arg)
@@ -37,7 +37,7 @@ define float @test_rint_f32(float %arg) {
define <2 x float> @test_rint_v2f32(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z4rintDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @llvm.rint.v2f32(<2 x float> [[ARG]])
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z4rintDv2_f(<2 x float> %arg)
@@ -47,7 +47,7 @@ define <2 x float> @test_rint_v2f32(<2 x float> %arg) {
define <3 x float> @test_rint_v3f32(<3 x float> %arg) {
; CHECK-LABEL: define <3 x float> @test_rint_v3f32
; CHECK-SAME: (<3 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x float> @_Z4rintDv3_f(<3 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x float> @llvm.rint.v3f32(<3 x float> [[ARG]])
; CHECK-NEXT: ret <3 x float> [[RINT]]
;
%rint = tail call <3 x float> @_Z4rintDv3_f(<3 x float> %arg)
@@ -57,7 +57,7 @@ define <3 x float> @test_rint_v3f32(<3 x float> %arg) {
define <4 x float> @test_rint_v4f32(<4 x float> %arg) {
; CHECK-LABEL: define <4 x float> @test_rint_v4f32
; CHECK-SAME: (<4 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x float> @_Z4rintDv4_f(<4 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x float> @llvm.rint.v4f32(<4 x float> [[ARG]])
; CHECK-NEXT: ret <4 x float> [[RINT]]
;
%rint = tail call <4 x float> @_Z4rintDv4_f(<4 x float> %arg)
@@ -67,7 +67,7 @@ define <4 x float> @test_rint_v4f32(<4 x float> %arg) {
define <8 x float> @test_rint_v8f32(<8 x float> %arg) {
; CHECK-LABEL: define <8 x float> @test_rint_v8f32
; CHECK-SAME: (<8 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x float> @_Z4rintDv8_f(<8 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x float> @llvm.rint.v8f32(<8 x float> [[ARG]])
; CHECK-NEXT: ret <8 x float> [[RINT]]
;
%rint = tail call <8 x float> @_Z4rintDv8_f(<8 x float> %arg)
@@ -77,7 +77,7 @@ define <8 x float> @test_rint_v8f32(<8 x float> %arg) {
define <16 x float> @test_rint_v16f32(<16 x float> %arg) {
; CHECK-LABEL: define <16 x float> @test_rint_v16f32
; CHECK-SAME: (<16 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x float> @_Z4rintDv16_f(<16 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x float> @llvm.rint.v16f32(<16 x float> [[ARG]])
; CHECK-NEXT: ret <16 x float> [[RINT]]
;
%rint = tail call <16 x float> @_Z4rintDv16_f(<16 x float> %arg)
@@ -87,7 +87,7 @@ define <16 x float> @test_rint_v16f32(<16 x float> %arg) {
define double @test_rint_f64(double %arg) {
; CHECK-LABEL: define double @test_rint_f64
; CHECK-SAME: (double [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call double @_Z4rintd(double [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call double @llvm.rint.f64(double [[ARG]])
; CHECK-NEXT: ret double [[RINT]]
;
%rint = tail call double @_Z4rintd(double %arg)
@@ -97,7 +97,7 @@ define double @test_rint_f64(double %arg) {
define <2 x double> @test_rint_v2f64(<2 x double> %arg) {
; CHECK-LABEL: define <2 x double> @test_rint_v2f64
; CHECK-SAME: (<2 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x double> @_Z4rintDv2_d(<2 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x double> @llvm.rint.v2f64(<2 x double> [[ARG]])
; CHECK-NEXT: ret <2 x double> [[RINT]]
;
%rint = tail call <2 x double> @_Z4rintDv2_d(<2 x double> %arg)
@@ -107,7 +107,7 @@ define <2 x double> @test_rint_v2f64(<2 x double> %arg) {
define <3 x double> @test_rint_v3f64(<3 x double> %arg) {
; CHECK-LABEL: define <3 x double> @test_rint_v3f64
; CHECK-SAME: (<3 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x double> @_Z4rintDv3_d(<3 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x double> @llvm.rint.v3f64(<3 x double> [[ARG]])
; CHECK-NEXT: ret <3 x double> [[RINT]]
;
%rint = tail call <3 x double> @_Z4rintDv3_d(<3 x double> %arg)
@@ -117,7 +117,7 @@ define <3 x double> @test_rint_v3f64(<3 x double> %arg) {
define <4 x double> @test_rint_v4f64(<4 x double> %arg) {
; CHECK-LABEL: define <4 x double> @test_rint_v4f64
; CHECK-SAME: (<4 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x double> @_Z4rintDv4_d(<4 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x double> @llvm.rint.v4f64(<4 x double> [[ARG]])
; CHECK-NEXT: ret <4 x double> [[RINT]]
;
%rint = tail call <4 x double> @_Z4rintDv4_d(<4 x double> %arg)
@@ -127,7 +127,7 @@ define <4 x double> @test_rint_v4f64(<4 x double> %arg) {
define <8 x double> @test_rint_v8f64(<8 x double> %arg) {
; CHECK-LABEL: define <8 x double> @test_rint_v8f64
; CHECK-SAME: (<8 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x double> @_Z4rintDv8_d(<8 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x double> @llvm.rint.v8f64(<8 x double> [[ARG]])
; CHECK-NEXT: ret <8 x double> [[RINT]]
;
%rint = tail call <8 x double> @_Z4rintDv8_d(<8 x double> %arg)
@@ -137,7 +137,7 @@ define <8 x double> @test_rint_v8f64(<8 x double> %arg) {
define <16 x double> @test_rint_v16f64(<16 x double> %arg) {
; CHECK-LABEL: define <16 x double> @test_rint_v16f64
; CHECK-SAME: (<16 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x double> @_Z4rintDv16_d(<16 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x double> @llvm.rint.v16f64(<16 x double> [[ARG]])
; CHECK-NEXT: ret <16 x double> [[RINT]]
;
%rint = tail call <16 x double> @_Z4rintDv16_d(<16 x double> %arg)
@@ -147,7 +147,7 @@ define <16 x double> @test_rint_v16f64(<16 x double> %arg) {
define half @test_rint_f16(half %arg) {
; CHECK-LABEL: define half @test_rint_f16
; CHECK-SAME: (half [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call half @_Z4rintDh(half [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call half @llvm.rint.f16(half [[ARG]])
; CHECK-NEXT: ret half [[RINT]]
;
%rint = tail call half @_Z4rintDh(half %arg)
@@ -157,7 +157,7 @@ define half @test_rint_f16(half %arg) {
define <2 x half> @test_rint_v2f16(<2 x half> %arg) {
; CHECK-LABEL: define <2 x half> @test_rint_v2f16
; CHECK-SAME: (<2 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x half> @_Z4rintDv2_Dh(<2 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x half> @llvm.rint.v2f16(<2 x half> [[ARG]])
; CHECK-NEXT: ret <2 x half> [[RINT]]
;
%rint = tail call <2 x half> @_Z4rintDv2_Dh(<2 x half> %arg)
@@ -167,7 +167,7 @@ define <2 x half> @test_rint_v2f16(<2 x half> %arg) {
define <3 x half> @test_rint_v3f16(<3 x half> %arg) {
; CHECK-LABEL: define <3 x half> @test_rint_v3f16
; CHECK-SAME: (<3 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x half> @_Z4rintDv3_Dh(<3 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x half> @llvm.rint.v3f16(<3 x half> [[ARG]])
; CHECK-NEXT: ret <3 x half> [[RINT]]
;
%rint = tail call <3 x half> @_Z4rintDv3_Dh(<3 x half> %arg)
@@ -177,7 +177,7 @@ define <3 x half> @test_rint_v3f16(<3 x half> %arg) {
define <4 x half> @test_rint_v4f16(<4 x half> %arg) {
; CHECK-LABEL: define <4 x half> @test_rint_v4f16
; CHECK-SAME: (<4 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x half> @_Z4rintDv4_Dh(<4 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x half> @llvm.rint.v4f16(<4 x half> [[ARG]])
; CHECK-NEXT: ret <4 x half> [[RINT]]
;
%rint = tail call <4 x half> @_Z4rintDv4_Dh(<4 x half> %arg)
@@ -187,7 +187,7 @@ define <4 x half> @test_rint_v4f16(<4 x half> %arg) {
define <8 x half> @test_rint_v8f16(<8 x half> %arg) {
; CHECK-LABEL: define <8 x half> @test_rint_v8f16
; CHECK-SAME: (<8 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x half> @_Z4rintDv8_Dh(<8 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x half> @llvm.rint.v8f16(<8 x half> [[ARG]])
; CHECK-NEXT: ret <8 x half> [[RINT]]
;
%rint = tail call <8 x half> @_Z4rintDv8_Dh(<8 x half> %arg)
@@ -197,7 +197,7 @@ define <8 x half> @test_rint_v8f16(<8 x half> %arg) {
define <16 x half> @test_rint_v16f16(<16 x half> %arg) {
; CHECK-LABEL: define <16 x half> @test_rint_v16f16
; CHECK-SAME: (<16 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x half> @_Z4rintDv16_Dh(<16 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x half> @llvm.rint.v16f16(<16 x half> [[ARG]])
; CHECK-NEXT: ret <16 x half> [[RINT]]
;
%rint = tail call <16 x half> @_Z4rintDv16_Dh(<16 x half> %arg)
@@ -207,7 +207,7 @@ define <16 x half> @test_rint_v16f16(<16 x half> %arg) {
define float @test_rint_f32_nobuiltin_callsite(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_nobuiltin_callsite
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z4rintf(float [[ARG]]) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z4rintf(float [[ARG]]) #[[ATTR4:[0-9]+]]
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z4rintf(float %arg) #0
@@ -217,7 +217,7 @@ define float @test_rint_f32_nobuiltin_callsite(float %arg) {
define <2 x float> @test_rint_v2f32_nobuiltin_callsite(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_nobuiltin_callsite
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z4rintDv2_f(<2 x float> [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z4rintDv2_f(<2 x float> [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z4rintDv2_f(<2 x float> %arg) #0
@@ -228,7 +228,7 @@ define <2 x float> @test_rint_v2f32_nobuiltin_callsite(<2 x float> %arg) {
define float @test_rint_f32_nobuiltins(float %arg) #1 {
; CHECK-LABEL: define float @test_rint_f32_nobuiltins
; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z4rintf(float [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z4rintf(float [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z4rintf(float %arg) #0
@@ -238,7 +238,7 @@ define float @test_rint_f32_nobuiltins(float %arg) #1 {
define <2 x float> @test_rint_v2f32_nobuiltins(<2 x float> %arg) #1 {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_nobuiltins
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z4rintDv2_f(<2 x float> [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z4rintDv2_f(<2 x float> [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z4rintDv2_f(<2 x float> %arg) #0
@@ -248,7 +248,7 @@ define <2 x float> @test_rint_v2f32_nobuiltins(<2 x float> %arg) #1 {
define float @test_rint_f32_preserve_flags(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_preserve_flags
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @_Z4rintf(float [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @llvm.rint.f32(float [[ARG]])
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call nnan ninf float @_Z4rintf(float %arg)
@@ -258,7 +258,7 @@ define float @test_rint_f32_preserve_flags(float %arg) {
define <2 x float> @test_rint_v2f32_preserve_flags(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_preserve_flags
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @_Z4rintDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @llvm.rint.v2f32(<2 x float> [[ARG]])
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call contract nsz nnan <2 x float> @_Z4rintDv2_f(<2 x float> %arg)
@@ -268,7 +268,7 @@ define <2 x float> @test_rint_v2f32_preserve_flags(<2 x float> %arg) {
define float @test_rint_f32_preserve_flags_md(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_preserve_flags_md
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @_Z4rintf(float [[ARG]]), !foo !0
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @llvm.rint.f32(float [[ARG]]), !foo !0
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call nnan ninf float @_Z4rintf(float %arg), !foo !0
@@ -278,7 +278,7 @@ define float @test_rint_f32_preserve_flags_md(float %arg) {
define <2 x float> @test_rint_v2f32_preserve_flags_md(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_preserve_flags_md
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @_Z4rintDv2_f(<2 x float> [[ARG]]), !foo !0
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @llvm.rint.v2f32(<2 x float> [[ARG]]), !foo !0
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call contract nsz nnan <2 x float> @_Z4rintDv2_f(<2 x float> %arg), !foo !0
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-round.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-round.ll
index bbae9f68cbad36..70fd1cb579f394 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-round.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-round.ll
@@ -27,7 +27,7 @@ declare <16 x half> @_Z5roundDv16_Dh(<16 x half>)
define float @test_rint_f32(float %arg) {
; CHECK-LABEL: define float @test_rint_f32
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5roundf(float [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @llvm.round.f32(float [[ARG]])
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z5roundf(float %arg)
@@ -37,7 +37,7 @@ define float @test_rint_f32(float %arg) {
define <2 x float> @test_rint_v2f32(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5roundDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @llvm.round.v2f32(<2 x float> [[ARG]])
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z5roundDv2_f(<2 x float> %arg)
@@ -47,7 +47,7 @@ define <2 x float> @test_rint_v2f32(<2 x float> %arg) {
define <3 x float> @test_rint_v3f32(<3 x float> %arg) {
; CHECK-LABEL: define <3 x float> @test_rint_v3f32
; CHECK-SAME: (<3 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x float> @_Z5roundDv3_f(<3 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x float> @llvm.round.v3f32(<3 x float> [[ARG]])
; CHECK-NEXT: ret <3 x float> [[RINT]]
;
%rint = tail call <3 x float> @_Z5roundDv3_f(<3 x float> %arg)
@@ -57,7 +57,7 @@ define <3 x float> @test_rint_v3f32(<3 x float> %arg) {
define <4 x float> @test_rint_v4f32(<4 x float> %arg) {
; CHECK-LABEL: define <4 x float> @test_rint_v4f32
; CHECK-SAME: (<4 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x float> @_Z5roundDv4_f(<4 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x float> @llvm.round.v4f32(<4 x float> [[ARG]])
; CHECK-NEXT: ret <4 x float> [[RINT]]
;
%rint = tail call <4 x float> @_Z5roundDv4_f(<4 x float> %arg)
@@ -67,7 +67,7 @@ define <4 x float> @test_rint_v4f32(<4 x float> %arg) {
define <8 x float> @test_rint_v8f32(<8 x float> %arg) {
; CHECK-LABEL: define <8 x float> @test_rint_v8f32
; CHECK-SAME: (<8 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x float> @_Z5roundDv8_f(<8 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x float> @llvm.round.v8f32(<8 x float> [[ARG]])
; CHECK-NEXT: ret <8 x float> [[RINT]]
;
%rint = tail call <8 x float> @_Z5roundDv8_f(<8 x float> %arg)
@@ -77,7 +77,7 @@ define <8 x float> @test_rint_v8f32(<8 x float> %arg) {
define <16 x float> @test_rint_v16f32(<16 x float> %arg) {
; CHECK-LABEL: define <16 x float> @test_rint_v16f32
; CHECK-SAME: (<16 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x float> @_Z5roundDv16_f(<16 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x float> @llvm.round.v16f32(<16 x float> [[ARG]])
; CHECK-NEXT: ret <16 x float> [[RINT]]
;
%rint = tail call <16 x float> @_Z5roundDv16_f(<16 x float> %arg)
@@ -87,7 +87,7 @@ define <16 x float> @test_rint_v16f32(<16 x float> %arg) {
define double @test_rint_f64(double %arg) {
; CHECK-LABEL: define double @test_rint_f64
; CHECK-SAME: (double [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call double @_Z5roundd(double [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call double @llvm.round.f64(double [[ARG]])
; CHECK-NEXT: ret double [[RINT]]
;
%rint = tail call double @_Z5roundd(double %arg)
@@ -97,7 +97,7 @@ define double @test_rint_f64(double %arg) {
define <2 x double> @test_rint_v2f64(<2 x double> %arg) {
; CHECK-LABEL: define <2 x double> @test_rint_v2f64
; CHECK-SAME: (<2 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x double> @_Z5roundDv2_d(<2 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x double> @llvm.round.v2f64(<2 x double> [[ARG]])
; CHECK-NEXT: ret <2 x double> [[RINT]]
;
%rint = tail call <2 x double> @_Z5roundDv2_d(<2 x double> %arg)
@@ -107,7 +107,7 @@ define <2 x double> @test_rint_v2f64(<2 x double> %arg) {
define <3 x double> @test_rint_v3f64(<3 x double> %arg) {
; CHECK-LABEL: define <3 x double> @test_rint_v3f64
; CHECK-SAME: (<3 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x double> @_Z5roundDv3_d(<3 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x double> @llvm.round.v3f64(<3 x double> [[ARG]])
; CHECK-NEXT: ret <3 x double> [[RINT]]
;
%rint = tail call <3 x double> @_Z5roundDv3_d(<3 x double> %arg)
@@ -117,7 +117,7 @@ define <3 x double> @test_rint_v3f64(<3 x double> %arg) {
define <4 x double> @test_rint_v4f64(<4 x double> %arg) {
; CHECK-LABEL: define <4 x double> @test_rint_v4f64
; CHECK-SAME: (<4 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x double> @_Z5roundDv4_d(<4 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x double> @llvm.round.v4f64(<4 x double> [[ARG]])
; CHECK-NEXT: ret <4 x double> [[RINT]]
;
%rint = tail call <4 x double> @_Z5roundDv4_d(<4 x double> %arg)
@@ -127,7 +127,7 @@ define <4 x double> @test_rint_v4f64(<4 x double> %arg) {
define <8 x double> @test_rint_v8f64(<8 x double> %arg) {
; CHECK-LABEL: define <8 x double> @test_rint_v8f64
; CHECK-SAME: (<8 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x double> @_Z5roundDv8_d(<8 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x double> @llvm.round.v8f64(<8 x double> [[ARG]])
; CHECK-NEXT: ret <8 x double> [[RINT]]
;
%rint = tail call <8 x double> @_Z5roundDv8_d(<8 x double> %arg)
@@ -137,7 +137,7 @@ define <8 x double> @test_rint_v8f64(<8 x double> %arg) {
define <16 x double> @test_rint_v16f64(<16 x double> %arg) {
; CHECK-LABEL: define <16 x double> @test_rint_v16f64
; CHECK-SAME: (<16 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x double> @_Z5roundDv16_d(<16 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x double> @llvm.round.v16f64(<16 x double> [[ARG]])
; CHECK-NEXT: ret <16 x double> [[RINT]]
;
%rint = tail call <16 x double> @_Z5roundDv16_d(<16 x double> %arg)
@@ -147,7 +147,7 @@ define <16 x double> @test_rint_v16f64(<16 x double> %arg) {
define half @test_rint_f16(half %arg) {
; CHECK-LABEL: define half @test_rint_f16
; CHECK-SAME: (half [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call half @_Z5roundDh(half [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call half @llvm.round.f16(half [[ARG]])
; CHECK-NEXT: ret half [[RINT]]
;
%rint = tail call half @_Z5roundDh(half %arg)
@@ -157,7 +157,7 @@ define half @test_rint_f16(half %arg) {
define <2 x half> @test_rint_v2f16(<2 x half> %arg) {
; CHECK-LABEL: define <2 x half> @test_rint_v2f16
; CHECK-SAME: (<2 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x half> @_Z5roundDv2_Dh(<2 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x half> @llvm.round.v2f16(<2 x half> [[ARG]])
; CHECK-NEXT: ret <2 x half> [[RINT]]
;
%rint = tail call <2 x half> @_Z5roundDv2_Dh(<2 x half> %arg)
@@ -167,7 +167,7 @@ define <2 x half> @test_rint_v2f16(<2 x half> %arg) {
define <3 x half> @test_rint_v3f16(<3 x half> %arg) {
; CHECK-LABEL: define <3 x half> @test_rint_v3f16
; CHECK-SAME: (<3 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x half> @_Z5roundDv3_Dh(<3 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x half> @llvm.round.v3f16(<3 x half> [[ARG]])
; CHECK-NEXT: ret <3 x half> [[RINT]]
;
%rint = tail call <3 x half> @_Z5roundDv3_Dh(<3 x half> %arg)
@@ -177,7 +177,7 @@ define <3 x half> @test_rint_v3f16(<3 x half> %arg) {
define <4 x half> @test_rint_v4f16(<4 x half> %arg) {
; CHECK-LABEL: define <4 x half> @test_rint_v4f16
; CHECK-SAME: (<4 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x half> @_Z5roundDv4_Dh(<4 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x half> @llvm.round.v4f16(<4 x half> [[ARG]])
; CHECK-NEXT: ret <4 x half> [[RINT]]
;
%rint = tail call <4 x half> @_Z5roundDv4_Dh(<4 x half> %arg)
@@ -187,7 +187,7 @@ define <4 x half> @test_rint_v4f16(<4 x half> %arg) {
define <8 x half> @test_rint_v8f16(<8 x half> %arg) {
; CHECK-LABEL: define <8 x half> @test_rint_v8f16
; CHECK-SAME: (<8 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x half> @_Z5roundDv8_Dh(<8 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x half> @llvm.round.v8f16(<8 x half> [[ARG]])
; CHECK-NEXT: ret <8 x half> [[RINT]]
;
%rint = tail call <8 x half> @_Z5roundDv8_Dh(<8 x half> %arg)
@@ -197,7 +197,7 @@ define <8 x half> @test_rint_v8f16(<8 x half> %arg) {
define <16 x half> @test_rint_v16f16(<16 x half> %arg) {
; CHECK-LABEL: define <16 x half> @test_rint_v16f16
; CHECK-SAME: (<16 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x half> @_Z5roundDv16_Dh(<16 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x half> @llvm.round.v16f16(<16 x half> [[ARG]])
; CHECK-NEXT: ret <16 x half> [[RINT]]
;
%rint = tail call <16 x half> @_Z5roundDv16_Dh(<16 x half> %arg)
@@ -207,7 +207,7 @@ define <16 x half> @test_rint_v16f16(<16 x half> %arg) {
define float @test_rint_f32_nobuiltin_callsite(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_nobuiltin_callsite
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5roundf(float [[ARG]]) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5roundf(float [[ARG]]) #[[ATTR4:[0-9]+]]
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z5roundf(float %arg) #0
@@ -217,7 +217,7 @@ define float @test_rint_f32_nobuiltin_callsite(float %arg) {
define <2 x float> @test_rint_v2f32_nobuiltin_callsite(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_nobuiltin_callsite
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5roundDv2_f(<2 x float> [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5roundDv2_f(<2 x float> [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z5roundDv2_f(<2 x float> %arg) #0
@@ -228,7 +228,7 @@ define <2 x float> @test_rint_v2f32_nobuiltin_callsite(<2 x float> %arg) {
define float @test_rint_f32_nobuiltins(float %arg) #1 {
; CHECK-LABEL: define float @test_rint_f32_nobuiltins
; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5roundf(float [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5roundf(float [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z5roundf(float %arg) #0
@@ -238,7 +238,7 @@ define float @test_rint_f32_nobuiltins(float %arg) #1 {
define <2 x float> @test_rint_v2f32_nobuiltins(<2 x float> %arg) #1 {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_nobuiltins
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5roundDv2_f(<2 x float> [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5roundDv2_f(<2 x float> [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z5roundDv2_f(<2 x float> %arg) #0
@@ -248,7 +248,7 @@ define <2 x float> @test_rint_v2f32_nobuiltins(<2 x float> %arg) #1 {
define float @test_rint_f32_preserve_flags(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_preserve_flags
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @_Z5roundf(float [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @llvm.round.f32(float [[ARG]])
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call nnan ninf float @_Z5roundf(float %arg)
@@ -258,7 +258,7 @@ define float @test_rint_f32_preserve_flags(float %arg) {
define <2 x float> @test_rint_v2f32_preserve_flags(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_preserve_flags
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @_Z5roundDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @llvm.round.v2f32(<2 x float> [[ARG]])
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call contract nsz nnan <2 x float> @_Z5roundDv2_f(<2 x float> %arg)
@@ -268,7 +268,7 @@ define <2 x float> @test_rint_v2f32_preserve_flags(<2 x float> %arg) {
define float @test_rint_f32_preserve_flags_md(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_preserve_flags_md
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @_Z5roundf(float [[ARG]]), !foo !0
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @llvm.round.f32(float [[ARG]]), !foo !0
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call nnan ninf float @_Z5roundf(float %arg), !foo !0
@@ -278,7 +278,7 @@ define float @test_rint_f32_preserve_flags_md(float %arg) {
define <2 x float> @test_rint_v2f32_preserve_flags_md(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_preserve_flags_md
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @_Z5roundDv2_f(<2 x float> [[ARG]]), !foo !0
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @llvm.round.v2f32(<2 x float> [[ARG]]), !foo !0
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call contract nsz nnan <2 x float> @_Z5roundDv2_f(<2 x float> %arg), !foo !0
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-trunc.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-trunc.ll
index 2a20a544676eb7..f7e273c92dd05f 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-trunc.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-trunc.ll
@@ -27,7 +27,7 @@ declare <16 x half> @_Z5truncDv16_Dh(<16 x half>)
define float @test_rint_f32(float %arg) {
; CHECK-LABEL: define float @test_rint_f32
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5truncf(float [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @llvm.trunc.f32(float [[ARG]])
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z5truncf(float %arg)
@@ -37,7 +37,7 @@ define float @test_rint_f32(float %arg) {
define <2 x float> @test_rint_v2f32(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5truncDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @llvm.trunc.v2f32(<2 x float> [[ARG]])
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z5truncDv2_f(<2 x float> %arg)
@@ -47,7 +47,7 @@ define <2 x float> @test_rint_v2f32(<2 x float> %arg) {
define <3 x float> @test_rint_v3f32(<3 x float> %arg) {
; CHECK-LABEL: define <3 x float> @test_rint_v3f32
; CHECK-SAME: (<3 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x float> @_Z5truncDv3_f(<3 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x float> @llvm.trunc.v3f32(<3 x float> [[ARG]])
; CHECK-NEXT: ret <3 x float> [[RINT]]
;
%rint = tail call <3 x float> @_Z5truncDv3_f(<3 x float> %arg)
@@ -57,7 +57,7 @@ define <3 x float> @test_rint_v3f32(<3 x float> %arg) {
define <4 x float> @test_rint_v4f32(<4 x float> %arg) {
; CHECK-LABEL: define <4 x float> @test_rint_v4f32
; CHECK-SAME: (<4 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x float> @_Z5truncDv4_f(<4 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x float> @llvm.trunc.v4f32(<4 x float> [[ARG]])
; CHECK-NEXT: ret <4 x float> [[RINT]]
;
%rint = tail call <4 x float> @_Z5truncDv4_f(<4 x float> %arg)
@@ -67,7 +67,7 @@ define <4 x float> @test_rint_v4f32(<4 x float> %arg) {
define <8 x float> @test_rint_v8f32(<8 x float> %arg) {
; CHECK-LABEL: define <8 x float> @test_rint_v8f32
; CHECK-SAME: (<8 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x float> @_Z5truncDv8_f(<8 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x float> @llvm.trunc.v8f32(<8 x float> [[ARG]])
; CHECK-NEXT: ret <8 x float> [[RINT]]
;
%rint = tail call <8 x float> @_Z5truncDv8_f(<8 x float> %arg)
@@ -77,7 +77,7 @@ define <8 x float> @test_rint_v8f32(<8 x float> %arg) {
define <16 x float> @test_rint_v16f32(<16 x float> %arg) {
; CHECK-LABEL: define <16 x float> @test_rint_v16f32
; CHECK-SAME: (<16 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x float> @_Z5truncDv16_f(<16 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x float> @llvm.trunc.v16f32(<16 x float> [[ARG]])
; CHECK-NEXT: ret <16 x float> [[RINT]]
;
%rint = tail call <16 x float> @_Z5truncDv16_f(<16 x float> %arg)
@@ -87,7 +87,7 @@ define <16 x float> @test_rint_v16f32(<16 x float> %arg) {
define double @test_rint_f64(double %arg) {
; CHECK-LABEL: define double @test_rint_f64
; CHECK-SAME: (double [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call double @_Z5truncd(double [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call double @llvm.trunc.f64(double [[ARG]])
; CHECK-NEXT: ret double [[RINT]]
;
%rint = tail call double @_Z5truncd(double %arg)
@@ -97,7 +97,7 @@ define double @test_rint_f64(double %arg) {
define <2 x double> @test_rint_v2f64(<2 x double> %arg) {
; CHECK-LABEL: define <2 x double> @test_rint_v2f64
; CHECK-SAME: (<2 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x double> @_Z5truncDv2_d(<2 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x double> @llvm.trunc.v2f64(<2 x double> [[ARG]])
; CHECK-NEXT: ret <2 x double> [[RINT]]
;
%rint = tail call <2 x double> @_Z5truncDv2_d(<2 x double> %arg)
@@ -107,7 +107,7 @@ define <2 x double> @test_rint_v2f64(<2 x double> %arg) {
define <3 x double> @test_rint_v3f64(<3 x double> %arg) {
; CHECK-LABEL: define <3 x double> @test_rint_v3f64
; CHECK-SAME: (<3 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x double> @_Z5truncDv3_d(<3 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x double> @llvm.trunc.v3f64(<3 x double> [[ARG]])
; CHECK-NEXT: ret <3 x double> [[RINT]]
;
%rint = tail call <3 x double> @_Z5truncDv3_d(<3 x double> %arg)
@@ -117,7 +117,7 @@ define <3 x double> @test_rint_v3f64(<3 x double> %arg) {
define <4 x double> @test_rint_v4f64(<4 x double> %arg) {
; CHECK-LABEL: define <4 x double> @test_rint_v4f64
; CHECK-SAME: (<4 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x double> @_Z5truncDv4_d(<4 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x double> @llvm.trunc.v4f64(<4 x double> [[ARG]])
; CHECK-NEXT: ret <4 x double> [[RINT]]
;
%rint = tail call <4 x double> @_Z5truncDv4_d(<4 x double> %arg)
@@ -127,7 +127,7 @@ define <4 x double> @test_rint_v4f64(<4 x double> %arg) {
define <8 x double> @test_rint_v8f64(<8 x double> %arg) {
; CHECK-LABEL: define <8 x double> @test_rint_v8f64
; CHECK-SAME: (<8 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x double> @_Z5truncDv8_d(<8 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x double> @llvm.trunc.v8f64(<8 x double> [[ARG]])
; CHECK-NEXT: ret <8 x double> [[RINT]]
;
%rint = tail call <8 x double> @_Z5truncDv8_d(<8 x double> %arg)
@@ -137,7 +137,7 @@ define <8 x double> @test_rint_v8f64(<8 x double> %arg) {
define <16 x double> @test_rint_v16f64(<16 x double> %arg) {
; CHECK-LABEL: define <16 x double> @test_rint_v16f64
; CHECK-SAME: (<16 x double> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x double> @_Z5truncDv16_d(<16 x double> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x double> @llvm.trunc.v16f64(<16 x double> [[ARG]])
; CHECK-NEXT: ret <16 x double> [[RINT]]
;
%rint = tail call <16 x double> @_Z5truncDv16_d(<16 x double> %arg)
@@ -147,7 +147,7 @@ define <16 x double> @test_rint_v16f64(<16 x double> %arg) {
define half @test_rint_f16(half %arg) {
; CHECK-LABEL: define half @test_rint_f16
; CHECK-SAME: (half [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call half @_Z5truncDh(half [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call half @llvm.trunc.f16(half [[ARG]])
; CHECK-NEXT: ret half [[RINT]]
;
%rint = tail call half @_Z5truncDh(half %arg)
@@ -157,7 +157,7 @@ define half @test_rint_f16(half %arg) {
define <2 x half> @test_rint_v2f16(<2 x half> %arg) {
; CHECK-LABEL: define <2 x half> @test_rint_v2f16
; CHECK-SAME: (<2 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x half> @_Z5truncDv2_Dh(<2 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x half> @llvm.trunc.v2f16(<2 x half> [[ARG]])
; CHECK-NEXT: ret <2 x half> [[RINT]]
;
%rint = tail call <2 x half> @_Z5truncDv2_Dh(<2 x half> %arg)
@@ -167,7 +167,7 @@ define <2 x half> @test_rint_v2f16(<2 x half> %arg) {
define <3 x half> @test_rint_v3f16(<3 x half> %arg) {
; CHECK-LABEL: define <3 x half> @test_rint_v3f16
; CHECK-SAME: (<3 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x half> @_Z5truncDv3_Dh(<3 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <3 x half> @llvm.trunc.v3f16(<3 x half> [[ARG]])
; CHECK-NEXT: ret <3 x half> [[RINT]]
;
%rint = tail call <3 x half> @_Z5truncDv3_Dh(<3 x half> %arg)
@@ -177,7 +177,7 @@ define <3 x half> @test_rint_v3f16(<3 x half> %arg) {
define <4 x half> @test_rint_v4f16(<4 x half> %arg) {
; CHECK-LABEL: define <4 x half> @test_rint_v4f16
; CHECK-SAME: (<4 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x half> @_Z5truncDv4_Dh(<4 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <4 x half> @llvm.trunc.v4f16(<4 x half> [[ARG]])
; CHECK-NEXT: ret <4 x half> [[RINT]]
;
%rint = tail call <4 x half> @_Z5truncDv4_Dh(<4 x half> %arg)
@@ -187,7 +187,7 @@ define <4 x half> @test_rint_v4f16(<4 x half> %arg) {
define <8 x half> @test_rint_v8f16(<8 x half> %arg) {
; CHECK-LABEL: define <8 x half> @test_rint_v8f16
; CHECK-SAME: (<8 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x half> @_Z5truncDv8_Dh(<8 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <8 x half> @llvm.trunc.v8f16(<8 x half> [[ARG]])
; CHECK-NEXT: ret <8 x half> [[RINT]]
;
%rint = tail call <8 x half> @_Z5truncDv8_Dh(<8 x half> %arg)
@@ -197,7 +197,7 @@ define <8 x half> @test_rint_v8f16(<8 x half> %arg) {
define <16 x half> @test_rint_v16f16(<16 x half> %arg) {
; CHECK-LABEL: define <16 x half> @test_rint_v16f16
; CHECK-SAME: (<16 x half> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x half> @_Z5truncDv16_Dh(<16 x half> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call <16 x half> @llvm.trunc.v16f16(<16 x half> [[ARG]])
; CHECK-NEXT: ret <16 x half> [[RINT]]
;
%rint = tail call <16 x half> @_Z5truncDv16_Dh(<16 x half> %arg)
@@ -207,7 +207,7 @@ define <16 x half> @test_rint_v16f16(<16 x half> %arg) {
define float @test_rint_f32_nobuiltin_callsite(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_nobuiltin_callsite
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5truncf(float [[ARG]]) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5truncf(float [[ARG]]) #[[ATTR4:[0-9]+]]
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z5truncf(float %arg) #0
@@ -217,7 +217,7 @@ define float @test_rint_f32_nobuiltin_callsite(float %arg) {
define <2 x float> @test_rint_v2f32_nobuiltin_callsite(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_nobuiltin_callsite
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5truncDv2_f(<2 x float> [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5truncDv2_f(<2 x float> [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z5truncDv2_f(<2 x float> %arg) #0
@@ -228,7 +228,7 @@ define <2 x float> @test_rint_v2f32_nobuiltin_callsite(<2 x float> %arg) {
define float @test_rint_f32_nobuiltins(float %arg) #1 {
; CHECK-LABEL: define float @test_rint_f32_nobuiltins
; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5truncf(float [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call float @_Z5truncf(float [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call float @_Z5truncf(float %arg) #0
@@ -238,7 +238,7 @@ define float @test_rint_f32_nobuiltins(float %arg) #1 {
define <2 x float> @test_rint_v2f32_nobuiltins(<2 x float> %arg) #1 {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_nobuiltins
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5truncDv2_f(<2 x float> [[ARG]]) #[[ATTR3]]
+; CHECK-NEXT: [[RINT:%.*]] = tail call <2 x float> @_Z5truncDv2_f(<2 x float> [[ARG]]) #[[ATTR4]]
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call <2 x float> @_Z5truncDv2_f(<2 x float> %arg) #0
@@ -248,7 +248,7 @@ define <2 x float> @test_rint_v2f32_nobuiltins(<2 x float> %arg) #1 {
define float @test_rint_f32_preserve_flags(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_preserve_flags
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @_Z5truncf(float [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @llvm.trunc.f32(float [[ARG]])
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call nnan ninf float @_Z5truncf(float %arg)
@@ -258,7 +258,7 @@ define float @test_rint_f32_preserve_flags(float %arg) {
define <2 x float> @test_rint_v2f32_preserve_flags(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_preserve_flags
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @_Z5truncDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @llvm.trunc.v2f32(<2 x float> [[ARG]])
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call contract nsz nnan <2 x float> @_Z5truncDv2_f(<2 x float> %arg)
@@ -268,7 +268,7 @@ define <2 x float> @test_rint_v2f32_preserve_flags(<2 x float> %arg) {
define float @test_rint_f32_preserve_flags_md(float %arg) {
; CHECK-LABEL: define float @test_rint_f32_preserve_flags_md
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @_Z5truncf(float [[ARG]]), !foo !0
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan ninf float @llvm.trunc.f32(float [[ARG]]), !foo !0
; CHECK-NEXT: ret float [[RINT]]
;
%rint = tail call nnan ninf float @_Z5truncf(float %arg), !foo !0
@@ -278,7 +278,7 @@ define float @test_rint_f32_preserve_flags_md(float %arg) {
define <2 x float> @test_rint_v2f32_preserve_flags_md(<2 x float> %arg) {
; CHECK-LABEL: define <2 x float> @test_rint_v2f32_preserve_flags_md
; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @_Z5truncDv2_f(<2 x float> [[ARG]]), !foo !0
+; CHECK-NEXT: [[RINT:%.*]] = tail call nnan nsz contract <2 x float> @llvm.trunc.v2f32(<2 x float> [[ARG]]), !foo !0
; CHECK-NEXT: ret <2 x float> [[RINT]]
;
%rint = tail call contract nsz nnan <2 x float> @_Z5truncDv2_f(<2 x float> %arg), !foo !0
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