[llvm] c264592 - [AArch64] Update check lines in neon-compare-instructions.ll
David Green via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 10 02:09:19 PDT 2023
Author: David Green
Date: 2023-08-10T10:09:13+01:00
New Revision: c26459258a2d37fc85ec9632a855f39da5ad9da2
URL: https://github.com/llvm/llvm-project/commit/c26459258a2d37fc85ec9632a855f39da5ad9da2
DIFF: https://github.com/llvm/llvm-project/commit/c26459258a2d37fc85ec9632a855f39da5ad9da2.diff
LOG: [AArch64] Update check lines in neon-compare-instructions.ll
-global-isel-abort=2 is no longer required, and many of the tests can now
shared CHECK lines between SDAG and GlobalISel.
Added:
Modified:
llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/neon-compare-instructions.ll b/llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
index 23848c8598249d..4b65f54c1caa94 100644
--- a/llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
+++ b/llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
@@ -1,17 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon %s -o - | FileCheck %s
-; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon -global-isel -global-isel-abort=2 %s -o - | FileCheck %s --check-prefix=GISEL
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
define <8 x i8> @cmeq8xi8(<8 x i8> %A, <8 x i8> %B) {
; CHECK-LABEL: cmeq8xi8:
; CHECK: // %bb.0:
; CHECK-NEXT: cmeq v0.8b, v0.8b, v1.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmeq8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
%tmp3 = icmp eq <8 x i8> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -22,11 +17,6 @@ define <16 x i8> @cmeq16xi8(<16 x i8> %A, <16 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmeq v0.16b, v0.16b, v1.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmeq16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
%tmp3 = icmp eq <16 x i8> %A, %B;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -37,11 +27,6 @@ define <4 x i16> @cmeq4xi16(<4 x i16> %A, <4 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmeq v0.4h, v0.4h, v1.4h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmeq4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: ret
%tmp3 = icmp eq <4 x i16> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -52,11 +37,6 @@ define <8 x i16> @cmeq8xi16(<8 x i16> %A, <8 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmeq v0.8h, v0.8h, v1.8h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmeq8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: ret
%tmp3 = icmp eq <8 x i16> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -67,11 +47,6 @@ define <2 x i32> @cmeq2xi32(<2 x i32> %A, <2 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmeq v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmeq2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = icmp eq <2 x i32> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -82,11 +57,6 @@ define <4 x i32> @cmeq4xi32(<4 x i32> %A, <4 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmeq v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmeq4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = icmp eq <4 x i32> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -97,11 +67,6 @@ define <2 x i64> @cmeq2xi64(<2 x i64> %A, <2 x i64> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmeq v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmeq2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = icmp eq <2 x i64> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -113,12 +78,6 @@ define <8 x i8> @cmne8xi8(<8 x i8> %A, <8 x i8> %B) {
; CHECK-NEXT: cmeq v0.8b, v0.8b, v1.8b
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmne8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = icmp ne <8 x i8> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -130,12 +89,6 @@ define <16 x i8> @cmne16xi8(<16 x i8> %A, <16 x i8> %B) {
; CHECK-NEXT: cmeq v0.16b, v0.16b, v1.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmne16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = icmp ne <16 x i8> %A, %B;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -147,12 +100,6 @@ define <4 x i16> @cmne4xi16(<4 x i16> %A, <4 x i16> %B) {
; CHECK-NEXT: cmeq v0.4h, v0.4h, v1.4h
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmne4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = icmp ne <4 x i16> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -164,12 +111,6 @@ define <8 x i16> @cmne8xi16(<8 x i16> %A, <8 x i16> %B) {
; CHECK-NEXT: cmeq v0.8h, v0.8h, v1.8h
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmne8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = icmp ne <8 x i16> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -181,12 +122,6 @@ define <2 x i32> @cmne2xi32(<2 x i32> %A, <2 x i32> %B) {
; CHECK-NEXT: cmeq v0.2s, v0.2s, v1.2s
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmne2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = icmp ne <2 x i32> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -198,12 +133,6 @@ define <4 x i32> @cmne4xi32(<4 x i32> %A, <4 x i32> %B) {
; CHECK-NEXT: cmeq v0.4s, v0.4s, v1.4s
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmne4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = icmp ne <4 x i32> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -215,12 +144,6 @@ define <2 x i64> @cmne2xi64(<2 x i64> %A, <2 x i64> %B) {
; CHECK-NEXT: cmeq v0.2d, v0.2d, v1.2d
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmne2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmeq v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = icmp ne <2 x i64> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -231,11 +154,6 @@ define <8 x i8> @cmgt8xi8(<8 x i8> %A, <8 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.8b, v0.8b, v1.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmgt8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
%tmp3 = icmp sgt <8 x i8> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -246,11 +164,6 @@ define <16 x i8> @cmgt16xi8(<16 x i8> %A, <16 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.16b, v0.16b, v1.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmgt16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
%tmp3 = icmp sgt <16 x i8> %A, %B;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -261,11 +174,6 @@ define <4 x i16> @cmgt4xi16(<4 x i16> %A, <4 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.4h, v0.4h, v1.4h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmgt4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: ret
%tmp3 = icmp sgt <4 x i16> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -276,11 +184,6 @@ define <8 x i16> @cmgt8xi16(<8 x i16> %A, <8 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.8h, v0.8h, v1.8h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmgt8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: ret
%tmp3 = icmp sgt <8 x i16> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -291,11 +194,6 @@ define <2 x i32> @cmgt2xi32(<2 x i32> %A, <2 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmgt2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = icmp sgt <2 x i32> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -306,11 +204,6 @@ define <4 x i32> @cmgt4xi32(<4 x i32> %A, <4 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmgt4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = icmp sgt <4 x i32> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -321,11 +214,6 @@ define <2 x i64> @cmgt2xi64(<2 x i64> %A, <2 x i64> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmgt2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = icmp sgt <2 x i64> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -337,11 +225,6 @@ define <8 x i8> @cmlt8xi8(<8 x i8> %A, <8 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.8b, v1.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlt8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.8b, v1.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = icmp slt <8 x i8> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -353,11 +236,6 @@ define <16 x i8> @cmlt16xi8(<16 x i8> %A, <16 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.16b, v1.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlt16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.16b, v1.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = icmp slt <16 x i8> %A, %B;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -369,11 +247,6 @@ define <4 x i16> @cmlt4xi16(<4 x i16> %A, <4 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.4h, v1.4h, v0.4h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlt4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.4h, v1.4h, v0.4h
-; GISEL-NEXT: ret
%tmp3 = icmp slt <4 x i16> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -385,11 +258,6 @@ define <8 x i16> @cmlt8xi16(<8 x i16> %A, <8 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.8h, v1.8h, v0.8h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlt8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.8h, v1.8h, v0.8h
-; GISEL-NEXT: ret
%tmp3 = icmp slt <8 x i16> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -401,11 +269,6 @@ define <2 x i32> @cmlt2xi32(<2 x i32> %A, <2 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.2s, v1.2s, v0.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlt2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
%tmp3 = icmp slt <2 x i32> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -417,11 +280,6 @@ define <4 x i32> @cmlt4xi32(<4 x i32> %A, <4 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.4s, v1.4s, v0.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlt4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
%tmp3 = icmp slt <4 x i32> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -433,11 +291,6 @@ define <2 x i64> @cmlt2xi64(<2 x i64> %A, <2 x i64> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmgt v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlt2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
%tmp3 = icmp slt <2 x i64> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -448,11 +301,6 @@ define <8 x i8> @cmge8xi8(<8 x i8> %A, <8 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.8b, v0.8b, v1.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmge8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
%tmp3 = icmp sge <8 x i8> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -463,11 +311,6 @@ define <16 x i8> @cmge16xi8(<16 x i8> %A, <16 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.16b, v0.16b, v1.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmge16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
%tmp3 = icmp sge <16 x i8> %A, %B;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -478,11 +321,6 @@ define <4 x i16> @cmge4xi16(<4 x i16> %A, <4 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.4h, v0.4h, v1.4h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmge4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: ret
%tmp3 = icmp sge <4 x i16> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -493,11 +331,6 @@ define <8 x i16> @cmge8xi16(<8 x i16> %A, <8 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.8h, v0.8h, v1.8h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmge8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: ret
%tmp3 = icmp sge <8 x i16> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -508,11 +341,6 @@ define <2 x i32> @cmge2xi32(<2 x i32> %A, <2 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmge2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = icmp sge <2 x i32> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -523,11 +351,6 @@ define <4 x i32> @cmge4xi32(<4 x i32> %A, <4 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmge4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = icmp sge <4 x i32> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -538,11 +361,6 @@ define <2 x i64> @cmge2xi64(<2 x i64> %A, <2 x i64> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmge2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = icmp sge <2 x i64> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -554,11 +372,6 @@ define <8 x i8> @cmle8xi8(<8 x i8> %A, <8 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.8b, v1.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmle8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.8b, v1.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = icmp sle <8 x i8> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -570,11 +383,6 @@ define <16 x i8> @cmle16xi8(<16 x i8> %A, <16 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.16b, v1.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmle16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.16b, v1.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = icmp sle <16 x i8> %A, %B;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -586,11 +394,6 @@ define <4 x i16> @cmle4xi16(<4 x i16> %A, <4 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.4h, v1.4h, v0.4h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmle4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.4h, v1.4h, v0.4h
-; GISEL-NEXT: ret
%tmp3 = icmp sle <4 x i16> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -602,11 +405,6 @@ define <8 x i16> @cmle8xi16(<8 x i16> %A, <8 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.8h, v1.8h, v0.8h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmle8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.8h, v1.8h, v0.8h
-; GISEL-NEXT: ret
%tmp3 = icmp sle <8 x i16> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -618,11 +416,6 @@ define <2 x i32> @cmle2xi32(<2 x i32> %A, <2 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.2s, v1.2s, v0.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmle2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
%tmp3 = icmp sle <2 x i32> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -634,11 +427,6 @@ define <4 x i32> @cmle4xi32(<4 x i32> %A, <4 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.4s, v1.4s, v0.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmle4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
%tmp3 = icmp sle <4 x i32> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -650,11 +438,6 @@ define <2 x i64> @cmle2xi64(<2 x i64> %A, <2 x i64> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmge v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmle2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmge v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
%tmp3 = icmp sle <2 x i64> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -665,11 +448,6 @@ define <8 x i8> @cmhi8xi8(<8 x i8> %A, <8 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.8b, v0.8b, v1.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhi8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
%tmp3 = icmp ugt <8 x i8> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -680,11 +458,6 @@ define <16 x i8> @cmhi16xi8(<16 x i8> %A, <16 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhi16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
%tmp3 = icmp ugt <16 x i8> %A, %B;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -695,11 +468,6 @@ define <4 x i16> @cmhi4xi16(<4 x i16> %A, <4 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.4h, v0.4h, v1.4h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhi4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: ret
%tmp3 = icmp ugt <4 x i16> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -710,11 +478,6 @@ define <8 x i16> @cmhi8xi16(<8 x i16> %A, <8 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhi8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: ret
%tmp3 = icmp ugt <8 x i16> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -725,11 +488,6 @@ define <2 x i32> @cmhi2xi32(<2 x i32> %A, <2 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhi2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = icmp ugt <2 x i32> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -740,11 +498,6 @@ define <4 x i32> @cmhi4xi32(<4 x i32> %A, <4 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhi4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = icmp ugt <4 x i32> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -755,11 +508,6 @@ define <2 x i64> @cmhi2xi64(<2 x i64> %A, <2 x i64> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhi2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = icmp ugt <2 x i64> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -771,11 +519,6 @@ define <8 x i8> @cmlo8xi8(<8 x i8> %A, <8 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.8b, v1.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlo8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.8b, v1.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = icmp ult <8 x i8> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -787,11 +530,6 @@ define <16 x i8> @cmlo16xi8(<16 x i8> %A, <16 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlo16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.16b, v1.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = icmp ult <16 x i8> %A, %B;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -803,11 +541,6 @@ define <4 x i16> @cmlo4xi16(<4 x i16> %A, <4 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.4h, v1.4h, v0.4h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlo4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.4h, v1.4h, v0.4h
-; GISEL-NEXT: ret
%tmp3 = icmp ult <4 x i16> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -819,11 +552,6 @@ define <8 x i16> @cmlo8xi16(<8 x i16> %A, <8 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlo8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.8h, v1.8h, v0.8h
-; GISEL-NEXT: ret
%tmp3 = icmp ult <8 x i16> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -835,11 +563,6 @@ define <2 x i32> @cmlo2xi32(<2 x i32> %A, <2 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.2s, v1.2s, v0.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlo2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
%tmp3 = icmp ult <2 x i32> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -851,11 +574,6 @@ define <4 x i32> @cmlo4xi32(<4 x i32> %A, <4 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlo4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
%tmp3 = icmp ult <4 x i32> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -867,11 +585,6 @@ define <2 x i64> @cmlo2xi64(<2 x i64> %A, <2 x i64> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlo2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhi v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
%tmp3 = icmp ult <2 x i64> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -882,11 +595,6 @@ define <8 x i8> @cmhs8xi8(<8 x i8> %A, <8 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.8b, v0.8b, v1.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhs8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
%tmp3 = icmp uge <8 x i8> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -897,11 +605,6 @@ define <16 x i8> @cmhs16xi8(<16 x i8> %A, <16 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.16b, v0.16b, v1.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhs16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
%tmp3 = icmp uge <16 x i8> %A, %B;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -912,11 +615,6 @@ define <4 x i16> @cmhs4xi16(<4 x i16> %A, <4 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.4h, v0.4h, v1.4h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhs4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: ret
%tmp3 = icmp uge <4 x i16> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -927,11 +625,6 @@ define <8 x i16> @cmhs8xi16(<8 x i16> %A, <8 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.8h, v0.8h, v1.8h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhs8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: ret
%tmp3 = icmp uge <8 x i16> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -942,11 +635,6 @@ define <2 x i32> @cmhs2xi32(<2 x i32> %A, <2 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhs2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = icmp uge <2 x i32> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -957,11 +645,6 @@ define <4 x i32> @cmhs4xi32(<4 x i32> %A, <4 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhs4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = icmp uge <4 x i32> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -972,11 +655,6 @@ define <2 x i64> @cmhs2xi64(<2 x i64> %A, <2 x i64> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmhs2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = icmp uge <2 x i64> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -988,11 +666,6 @@ define <8 x i8> @cmls8xi8(<8 x i8> %A, <8 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.8b, v1.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmls8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.8b, v1.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = icmp ule <8 x i8> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -1004,11 +677,6 @@ define <16 x i8> @cmls16xi8(<16 x i8> %A, <16 x i8> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.16b, v1.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmls16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.16b, v1.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = icmp ule <16 x i8> %A, %B;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -1020,11 +688,6 @@ define <4 x i16> @cmls4xi16(<4 x i16> %A, <4 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.4h, v1.4h, v0.4h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmls4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.4h, v1.4h, v0.4h
-; GISEL-NEXT: ret
%tmp3 = icmp ule <4 x i16> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -1036,11 +699,6 @@ define <8 x i16> @cmls8xi16(<8 x i16> %A, <8 x i16> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.8h, v1.8h, v0.8h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmls8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.8h, v1.8h, v0.8h
-; GISEL-NEXT: ret
%tmp3 = icmp ule <8 x i16> %A, %B;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -1052,11 +710,6 @@ define <2 x i32> @cmls2xi32(<2 x i32> %A, <2 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.2s, v1.2s, v0.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmls2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
%tmp3 = icmp ule <2 x i32> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -1068,11 +721,6 @@ define <4 x i32> @cmls4xi32(<4 x i32> %A, <4 x i32> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmls4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
%tmp3 = icmp ule <4 x i32> %A, %B;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -1084,29 +732,24 @@ define <2 x i64> @cmls2xi64(<2 x i64> %A, <2 x i64> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: cmhs v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmls2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: cmhs v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
%tmp3 = icmp ule <2 x i64> %A, %B;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <8 x i8> @cmtst8xi8(<8 x i8> %A, <8 x i8> %B) {
-; CHECK-LABEL: cmtst8xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.8b, v0.8b, v1.8b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmtst8xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.8b, v0.8b, v1.8b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmtst8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v2.2d, #0000000000000000
-; GISEL-NEXT: and v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: cmeq v0.8b, v0.8b, v2.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmtst8xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
+; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: cmeq v0.8b, v0.8b, v2.8b
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = and <8 x i8> %A, %B
%tmp4 = icmp ne <8 x i8> %tmp3, zeroinitializer
%tmp5 = sext <8 x i1> %tmp4 to <8 x i8>
@@ -1114,18 +757,18 @@ define <8 x i8> @cmtst8xi8(<8 x i8> %A, <8 x i8> %B) {
}
define <16 x i8> @cmtst16xi8(<16 x i8> %A, <16 x i8> %B) {
-; CHECK-LABEL: cmtst16xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.16b, v0.16b, v1.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmtst16xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.16b, v0.16b, v1.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmtst16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v2.2d, #0000000000000000
-; GISEL-NEXT: and v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: cmeq v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmtst16xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
+; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: cmeq v0.16b, v0.16b, v2.16b
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = and <16 x i8> %A, %B
%tmp4 = icmp ne <16 x i8> %tmp3, zeroinitializer
%tmp5 = sext <16 x i1> %tmp4 to <16 x i8>
@@ -1133,18 +776,18 @@ define <16 x i8> @cmtst16xi8(<16 x i8> %A, <16 x i8> %B) {
}
define <4 x i16> @cmtst4xi16(<4 x i16> %A, <4 x i16> %B) {
-; CHECK-LABEL: cmtst4xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.4h, v0.4h, v1.4h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmtst4xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.4h, v0.4h, v1.4h
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmtst4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v2.2d, #0000000000000000
-; GISEL-NEXT: and v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: cmeq v0.4h, v0.4h, v2.4h
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmtst4xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
+; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: cmeq v0.4h, v0.4h, v2.4h
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = and <4 x i16> %A, %B
%tmp4 = icmp ne <4 x i16> %tmp3, zeroinitializer
%tmp5 = sext <4 x i1> %tmp4 to <4 x i16>
@@ -1152,18 +795,18 @@ define <4 x i16> @cmtst4xi16(<4 x i16> %A, <4 x i16> %B) {
}
define <8 x i16> @cmtst8xi16(<8 x i16> %A, <8 x i16> %B) {
-; CHECK-LABEL: cmtst8xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.8h, v0.8h, v1.8h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmtst8xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.8h, v0.8h, v1.8h
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmtst8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v2.2d, #0000000000000000
-; GISEL-NEXT: and v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: cmeq v0.8h, v0.8h, v2.8h
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmtst8xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
+; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: cmeq v0.8h, v0.8h, v2.8h
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = and <8 x i16> %A, %B
%tmp4 = icmp ne <8 x i16> %tmp3, zeroinitializer
%tmp5 = sext <8 x i1> %tmp4 to <8 x i16>
@@ -1171,18 +814,18 @@ define <8 x i16> @cmtst8xi16(<8 x i16> %A, <8 x i16> %B) {
}
define <2 x i32> @cmtst2xi32(<2 x i32> %A, <2 x i32> %B) {
-; CHECK-LABEL: cmtst2xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.2s, v0.2s, v1.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmtst2xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.2s, v0.2s, v1.2s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmtst2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v2.2d, #0000000000000000
-; GISEL-NEXT: and v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: cmeq v0.2s, v0.2s, v2.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmtst2xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
+; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: cmeq v0.2s, v0.2s, v2.2s
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = and <2 x i32> %A, %B
%tmp4 = icmp ne <2 x i32> %tmp3, zeroinitializer
%tmp5 = sext <2 x i1> %tmp4 to <2 x i32>
@@ -1190,18 +833,18 @@ define <2 x i32> @cmtst2xi32(<2 x i32> %A, <2 x i32> %B) {
}
define <4 x i32> @cmtst4xi32(<4 x i32> %A, <4 x i32> %B) {
-; CHECK-LABEL: cmtst4xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmtst4xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmtst4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v2.2d, #0000000000000000
-; GISEL-NEXT: and v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: cmeq v0.4s, v0.4s, v2.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmtst4xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
+; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: cmeq v0.4s, v0.4s, v2.4s
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = and <4 x i32> %A, %B
%tmp4 = icmp ne <4 x i32> %tmp3, zeroinitializer
%tmp5 = sext <4 x i1> %tmp4 to <4 x i32>
@@ -1209,18 +852,18 @@ define <4 x i32> @cmtst4xi32(<4 x i32> %A, <4 x i32> %B) {
}
define <2 x i64> @cmtst2xi64(<2 x i64> %A, <2 x i64> %B) {
-; CHECK-LABEL: cmtst2xi64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.2d, v0.2d, v1.2d
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmtst2xi64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.2d, v0.2d, v1.2d
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmtst2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v2.2d, #0000000000000000
-; GISEL-NEXT: and v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: cmeq v0.2d, v0.2d, v2.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmtst2xi64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
+; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: cmeq v0.2d, v0.2d, v2.2d
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = and <2 x i64> %A, %B
%tmp4 = icmp ne <2 x i64> %tmp3, zeroinitializer
%tmp5 = sext <2 x i1> %tmp4 to <2 x i64>
@@ -1230,112 +873,112 @@ define <2 x i64> @cmtst2xi64(<2 x i64> %A, <2 x i64> %B) {
define <8 x i8> @cmeqz8xi8(<8 x i8> %A) {
-; CHECK-LABEL: cmeqz8xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmeq v0.8b, v0.8b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmeqz8xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmeq v0.8b, v0.8b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmeqz8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmeqz8xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp eq <8 x i8> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
}
define <16 x i8> @cmeqz16xi8(<16 x i8> %A) {
-; CHECK-LABEL: cmeqz16xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmeq v0.16b, v0.16b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmeqz16xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmeq v0.16b, v0.16b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmeqz16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmeqz16xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp eq <16 x i8> %A, zeroinitializer;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
}
define <4 x i16> @cmeqz4xi16(<4 x i16> %A) {
-; CHECK-LABEL: cmeqz4xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmeq v0.4h, v0.4h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmeqz4xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmeq v0.4h, v0.4h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmeqz4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmeqz4xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.4h, v0.4h, v1.4h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp eq <4 x i16> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
}
define <8 x i16> @cmeqz8xi16(<8 x i16> %A) {
-; CHECK-LABEL: cmeqz8xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmeq v0.8h, v0.8h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmeqz8xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmeq v0.8h, v0.8h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmeqz8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmeqz8xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.8h, v0.8h, v1.8h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp eq <8 x i16> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
}
define <2 x i32> @cmeqz2xi32(<2 x i32> %A) {
-; CHECK-LABEL: cmeqz2xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmeq v0.2s, v0.2s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmeqz2xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmeq v0.2s, v0.2s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmeqz2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmeqz2xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp eq <2 x i32> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @cmeqz4xi32(<4 x i32> %A) {
-; CHECK-LABEL: cmeqz4xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmeq v0.4s, v0.4s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmeqz4xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmeq v0.4s, v0.4s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmeqz4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmeqz4xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp eq <4 x i32> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @cmeqz2xi64(<2 x i64> %A) {
-; CHECK-LABEL: cmeqz2xi64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmeq v0.2d, v0.2d, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmeqz2xi64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmeq v0.2d, v0.2d, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmeqz2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmeqz2xi64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.2d, v0.2d, v1.2d
+; CHECK-GI-NEXT: ret
%tmp3 = icmp eq <2 x i64> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -1343,112 +986,112 @@ define <2 x i64> @cmeqz2xi64(<2 x i64> %A) {
define <8 x i8> @cmgez8xi8(<8 x i8> %A) {
-; CHECK-LABEL: cmgez8xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.8b, v0.8b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez8xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.8b, v0.8b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez8xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sge <8 x i8> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
}
define <16 x i8> @cmgez16xi8(<16 x i8> %A) {
-; CHECK-LABEL: cmgez16xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.16b, v0.16b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez16xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.16b, v0.16b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez16xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sge <16 x i8> %A, zeroinitializer;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
}
define <4 x i16> @cmgez4xi16(<4 x i16> %A) {
-; CHECK-LABEL: cmgez4xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.4h, v0.4h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez4xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.4h, v0.4h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez4xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.4h, v0.4h, v1.4h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sge <4 x i16> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
}
define <8 x i16> @cmgez8xi16(<8 x i16> %A) {
-; CHECK-LABEL: cmgez8xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.8h, v0.8h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez8xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.8h, v0.8h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez8xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.8h, v0.8h, v1.8h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sge <8 x i16> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
}
define <2 x i32> @cmgez2xi32(<2 x i32> %A) {
-; CHECK-LABEL: cmgez2xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.2s, v0.2s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez2xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.2s, v0.2s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez2xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sge <2 x i32> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @cmgez4xi32(<4 x i32> %A) {
-; CHECK-LABEL: cmgez4xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.4s, v0.4s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez4xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.4s, v0.4s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez4xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sge <4 x i32> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @cmgez2xi64(<2 x i64> %A) {
-; CHECK-LABEL: cmgez2xi64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.2d, v0.2d, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez2xi64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.2d, v0.2d, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez2xi64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.2d, v0.2d, v1.2d
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sge <2 x i64> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -1456,112 +1099,112 @@ define <2 x i64> @cmgez2xi64(<2 x i64> %A) {
define <8 x i8> @cmgez8xi8_alt(<8 x i8> %A) {
-; CHECK-LABEL: cmgez8xi8_alt:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.8b, v0.8b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez8xi8_alt:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.8b, v0.8b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez8xi8_alt:
-; GISEL: // %bb.0:
-; GISEL-NEXT: sshr v0.8b, v0.8b, #7
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez8xi8_alt:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: sshr v0.8b, v0.8b, #7
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%sign = ashr <8 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%not = xor <8 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
ret <8 x i8> %not
}
define <16 x i8> @cmgez16xi8_alt(<16 x i8> %A) {
-; CHECK-LABEL: cmgez16xi8_alt:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.16b, v0.16b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez16xi8_alt:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.16b, v0.16b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez16xi8_alt:
-; GISEL: // %bb.0:
-; GISEL-NEXT: sshr v0.16b, v0.16b, #7
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez16xi8_alt:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: sshr v0.16b, v0.16b, #7
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%sign = ashr <16 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%not = xor <16 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
ret <16 x i8> %not
}
define <4 x i16> @cmgez4xi16_alt(<4 x i16> %A) {
-; CHECK-LABEL: cmgez4xi16_alt:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.4h, v0.4h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez4xi16_alt:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.4h, v0.4h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez4xi16_alt:
-; GISEL: // %bb.0:
-; GISEL-NEXT: sshr v0.4h, v0.4h, #15
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez4xi16_alt:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: sshr v0.4h, v0.4h, #15
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%sign = ashr <4 x i16> %A, <i16 15, i16 15, i16 15, i16 15>
%not = xor <4 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1>
ret <4 x i16> %not
}
define <8 x i16> @cmgez8xi16_alt(<8 x i16> %A) {
-; CHECK-LABEL: cmgez8xi16_alt:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.8h, v0.8h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez8xi16_alt:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.8h, v0.8h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez8xi16_alt:
-; GISEL: // %bb.0:
-; GISEL-NEXT: sshr v0.8h, v0.8h, #15
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez8xi16_alt:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: sshr v0.8h, v0.8h, #15
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%sign = ashr <8 x i16> %A, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
%not = xor <8 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
ret <8 x i16> %not
}
define <2 x i32> @cmgez2xi32_alt(<2 x i32> %A) {
-; CHECK-LABEL: cmgez2xi32_alt:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.2s, v0.2s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez2xi32_alt:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.2s, v0.2s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez2xi32_alt:
-; GISEL: // %bb.0:
-; GISEL-NEXT: sshr v0.2s, v0.2s, #31
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez2xi32_alt:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: sshr v0.2s, v0.2s, #31
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%sign = ashr <2 x i32> %A, <i32 31, i32 31>
%not = xor <2 x i32> %sign, <i32 -1, i32 -1>
ret <2 x i32> %not
}
define <4 x i32> @cmgez4xi32_alt(<4 x i32> %A) {
-; CHECK-LABEL: cmgez4xi32_alt:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.4s, v0.4s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez4xi32_alt:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.4s, v0.4s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez4xi32_alt:
-; GISEL: // %bb.0:
-; GISEL-NEXT: sshr v0.4s, v0.4s, #31
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez4xi32_alt:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: sshr v0.4s, v0.4s, #31
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%sign = ashr <4 x i32> %A, <i32 31, i32 31, i32 31, i32 31>
%not = xor <4 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1>
ret <4 x i32> %not
}
define <2 x i64> @cmgez2xi64_alt(<2 x i64> %A) {
-; CHECK-LABEL: cmgez2xi64_alt:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmge v0.2d, v0.2d, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgez2xi64_alt:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmge v0.2d, v0.2d, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgez2xi64_alt:
-; GISEL: // %bb.0:
-; GISEL-NEXT: sshr v0.2d, v0.2d, #63
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgez2xi64_alt:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: sshr v0.2d, v0.2d, #63
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%sign = ashr <2 x i64> %A, <i64 63, i64 63>
%not = xor <2 x i64> %sign, <i64 -1, i64 -1>
ret <2 x i64> %not
@@ -1569,582 +1212,582 @@ define <2 x i64> @cmgez2xi64_alt(<2 x i64> %A) {
define <8 x i8> @cmgtz8xi8(<8 x i8> %A) {
-; CHECK-LABEL: cmgtz8xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmgt v0.8b, v0.8b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgtz8xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmgt v0.8b, v0.8b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgtz8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgtz8xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sgt <8 x i8> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
}
define <16 x i8> @cmgtz16xi8(<16 x i8> %A) {
-; CHECK-LABEL: cmgtz16xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmgt v0.16b, v0.16b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgtz16xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmgt v0.16b, v0.16b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgtz16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgtz16xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sgt <16 x i8> %A, zeroinitializer;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
}
define <4 x i16> @cmgtz4xi16(<4 x i16> %A) {
-; CHECK-LABEL: cmgtz4xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmgt v0.4h, v0.4h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgtz4xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmgt v0.4h, v0.4h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgtz4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgtz4xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.4h, v0.4h, v1.4h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sgt <4 x i16> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
}
define <8 x i16> @cmgtz8xi16(<8 x i16> %A) {
-; CHECK-LABEL: cmgtz8xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmgt v0.8h, v0.8h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgtz8xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmgt v0.8h, v0.8h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgtz8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgtz8xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.8h, v0.8h, v1.8h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sgt <8 x i16> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
}
define <2 x i32> @cmgtz2xi32(<2 x i32> %A) {
-; CHECK-LABEL: cmgtz2xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmgt v0.2s, v0.2s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgtz2xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmgt v0.2s, v0.2s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgtz2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgtz2xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sgt <2 x i32> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @cmgtz4xi32(<4 x i32> %A) {
-; CHECK-LABEL: cmgtz4xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmgt v0.4s, v0.4s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgtz4xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmgt v0.4s, v0.4s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgtz4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgtz4xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sgt <4 x i32> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @cmgtz2xi64(<2 x i64> %A) {
-; CHECK-LABEL: cmgtz2xi64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmgt v0.2d, v0.2d, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmgtz2xi64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmgt v0.2d, v0.2d, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmgtz2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmgtz2xi64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.2d, v0.2d, v1.2d
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sgt <2 x i64> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <8 x i8> @cmlez8xi8(<8 x i8> %A) {
-; CHECK-LABEL: cmlez8xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmle v0.8b, v0.8b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmlez8xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmle v0.8b, v0.8b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmlez8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.8b, v1.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmlez8xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.8b, v1.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sle <8 x i8> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
}
define <16 x i8> @cmlez16xi8(<16 x i8> %A) {
-; CHECK-LABEL: cmlez16xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmle v0.16b, v0.16b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmlez16xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmle v0.16b, v0.16b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmlez16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.16b, v1.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmlez16xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.16b, v1.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sle <16 x i8> %A, zeroinitializer;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
}
define <4 x i16> @cmlez4xi16(<4 x i16> %A) {
-; CHECK-LABEL: cmlez4xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmle v0.4h, v0.4h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmlez4xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmle v0.4h, v0.4h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmlez4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.4h, v1.4h, v0.4h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmlez4xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.4h, v1.4h, v0.4h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sle <4 x i16> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
}
define <8 x i16> @cmlez8xi16(<8 x i16> %A) {
-; CHECK-LABEL: cmlez8xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmle v0.8h, v0.8h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmlez8xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmle v0.8h, v0.8h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmlez8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.8h, v1.8h, v0.8h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmlez8xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.8h, v1.8h, v0.8h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sle <8 x i16> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
}
define <2 x i32> @cmlez2xi32(<2 x i32> %A) {
-; CHECK-LABEL: cmlez2xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmle v0.2s, v0.2s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmlez2xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmle v0.2s, v0.2s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmlez2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmlez2xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.2s, v1.2s, v0.2s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sle <2 x i32> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @cmlez4xi32(<4 x i32> %A) {
-; CHECK-LABEL: cmlez4xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmle v0.4s, v0.4s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmlez4xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmle v0.4s, v0.4s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmlez4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmlez4xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.4s, v1.4s, v0.4s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sle <4 x i32> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @cmlez2xi64(<2 x i64> %A) {
-; CHECK-LABEL: cmlez2xi64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmle v0.2d, v0.2d, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmlez2xi64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmle v0.2d, v0.2d, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmlez2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmge v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmlez2xi64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmge v0.2d, v1.2d, v0.2d
+; CHECK-GI-NEXT: ret
%tmp3 = icmp sle <2 x i64> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <8 x i8> @cmltz8xi8(<8 x i8> %A) {
-; CHECK-LABEL: cmltz8xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmlt v0.8b, v0.8b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmltz8xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmlt v0.8b, v0.8b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmltz8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.8b, v1.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmltz8xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.8b, v1.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp slt <8 x i8> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
}
define <16 x i8> @cmltz16xi8(<16 x i8> %A) {
-; CHECK-LABEL: cmltz16xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmlt v0.16b, v0.16b, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmltz16xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmlt v0.16b, v0.16b, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmltz16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.16b, v1.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmltz16xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.16b, v1.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp slt <16 x i8> %A, zeroinitializer;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
}
define <4 x i16> @cmltz4xi16(<4 x i16> %A) {
-; CHECK-LABEL: cmltz4xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmlt v0.4h, v0.4h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmltz4xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmlt v0.4h, v0.4h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmltz4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.4h, v1.4h, v0.4h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmltz4xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.4h, v1.4h, v0.4h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp slt <4 x i16> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
}
define <8 x i16> @cmltz8xi16(<8 x i16> %A) {
-; CHECK-LABEL: cmltz8xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmlt v0.8h, v0.8h, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmltz8xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmlt v0.8h, v0.8h, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmltz8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.8h, v1.8h, v0.8h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmltz8xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.8h, v1.8h, v0.8h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp slt <8 x i16> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
}
define <2 x i32> @cmltz2xi32(<2 x i32> %A) {
-; CHECK-LABEL: cmltz2xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmlt v0.2s, v0.2s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmltz2xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmlt v0.2s, v0.2s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmltz2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmltz2xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.2s, v1.2s, v0.2s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp slt <2 x i32> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @cmltz4xi32(<4 x i32> %A) {
-; CHECK-LABEL: cmltz4xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmlt v0.4s, v0.4s, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmltz4xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmlt v0.4s, v0.4s, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmltz4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmltz4xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.4s, v1.4s, v0.4s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp slt <4 x i32> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @cmltz2xi64(<2 x i64> %A) {
-; CHECK-LABEL: cmltz2xi64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmlt v0.2d, v0.2d, #0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmltz2xi64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmlt v0.2d, v0.2d, #0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmltz2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmltz2xi64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmgt v0.2d, v1.2d, v0.2d
+; CHECK-GI-NEXT: ret
%tmp3 = icmp slt <2 x i64> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <8 x i8> @cmneqz8xi8(<8 x i8> %A) {
-; CHECK-LABEL: cmneqz8xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.8b, v0.8b, v0.8b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmneqz8xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.8b, v0.8b, v0.8b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmneqz8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmneqz8xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ne <8 x i8> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
}
define <16 x i8> @cmneqz16xi8(<16 x i8> %A) {
-; CHECK-LABEL: cmneqz16xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.16b, v0.16b, v0.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmneqz16xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.16b, v0.16b, v0.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmneqz16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmneqz16xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ne <16 x i8> %A, zeroinitializer;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
}
define <4 x i16> @cmneqz4xi16(<4 x i16> %A) {
-; CHECK-LABEL: cmneqz4xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.4h, v0.4h, v0.4h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmneqz4xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.4h, v0.4h, v0.4h
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmneqz4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmneqz4xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.4h, v0.4h, v1.4h
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ne <4 x i16> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
}
define <8 x i16> @cmneqz8xi16(<8 x i16> %A) {
-; CHECK-LABEL: cmneqz8xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.8h, v0.8h, v0.8h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmneqz8xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.8h, v0.8h, v0.8h
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmneqz8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmneqz8xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.8h, v0.8h, v1.8h
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ne <8 x i16> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
}
define <2 x i32> @cmneqz2xi32(<2 x i32> %A) {
-; CHECK-LABEL: cmneqz2xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.2s, v0.2s, v0.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmneqz2xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.2s, v0.2s, v0.2s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmneqz2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmneqz2xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ne <2 x i32> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @cmneqz4xi32(<4 x i32> %A) {
-; CHECK-LABEL: cmneqz4xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.4s, v0.4s, v0.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmneqz4xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.4s, v0.4s, v0.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmneqz4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmneqz4xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ne <4 x i32> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @cmneqz2xi64(<2 x i64> %A) {
-; CHECK-LABEL: cmneqz2xi64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: cmtst v0.2d, v0.2d, v0.2d
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmneqz2xi64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: cmtst v0.2d, v0.2d, v0.2d
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmneqz2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmeq v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmneqz2xi64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: cmeq v0.2d, v0.2d, v1.2d
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ne <2 x i64> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <8 x i8> @cmhsz8xi8(<8 x i8> %A) {
-; CHECK-LABEL: cmhsz8xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.8b, #2
-; CHECK-NEXT: cmhs v0.8b, v0.8b, v1.8b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhsz8xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.8b, #2
+; CHECK-SD-NEXT: cmhs v0.8b, v0.8b, v1.8b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhsz8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI126_0
-; GISEL-NEXT: ldr d1, [x8, :lo12:.LCPI126_0]
-; GISEL-NEXT: cmhs v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhsz8xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI126_0
+; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI126_0]
+; CHECK-GI-NEXT: cmhs v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp uge <8 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
}
define <16 x i8> @cmhsz16xi8(<16 x i8> %A) {
-; CHECK-LABEL: cmhsz16xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.16b, #2
-; CHECK-NEXT: cmhs v0.16b, v0.16b, v1.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhsz16xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.16b, #2
+; CHECK-SD-NEXT: cmhs v0.16b, v0.16b, v1.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhsz16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI127_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI127_0]
-; GISEL-NEXT: cmhs v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhsz16xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI127_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI127_0]
+; CHECK-GI-NEXT: cmhs v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp uge <16 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
}
define <4 x i16> @cmhsz4xi16(<4 x i16> %A) {
-; CHECK-LABEL: cmhsz4xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.4h, #2
-; CHECK-NEXT: cmhs v0.4h, v0.4h, v1.4h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhsz4xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.4h, #2
+; CHECK-SD-NEXT: cmhs v0.4h, v0.4h, v1.4h
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhsz4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI128_0
-; GISEL-NEXT: ldr d1, [x8, :lo12:.LCPI128_0]
-; GISEL-NEXT: cmhs v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhsz4xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI128_0
+; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI128_0]
+; CHECK-GI-NEXT: cmhs v0.4h, v0.4h, v1.4h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp uge <4 x i16> %A, <i16 2, i16 2, i16 2, i16 2>
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
}
define <8 x i16> @cmhsz8xi16(<8 x i16> %A) {
-; CHECK-LABEL: cmhsz8xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.8h, #2
-; CHECK-NEXT: cmhs v0.8h, v0.8h, v1.8h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhsz8xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.8h, #2
+; CHECK-SD-NEXT: cmhs v0.8h, v0.8h, v1.8h
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhsz8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI129_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI129_0]
-; GISEL-NEXT: cmhs v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhsz8xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI129_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI129_0]
+; CHECK-GI-NEXT: cmhs v0.8h, v0.8h, v1.8h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp uge <8 x i16> %A, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
}
define <2 x i32> @cmhsz2xi32(<2 x i32> %A) {
-; CHECK-LABEL: cmhsz2xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.2s, #2
-; CHECK-NEXT: cmhs v0.2s, v0.2s, v1.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhsz2xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.2s, #2
+; CHECK-SD-NEXT: cmhs v0.2s, v0.2s, v1.2s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhsz2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI130_0
-; GISEL-NEXT: ldr d1, [x8, :lo12:.LCPI130_0]
-; GISEL-NEXT: cmhs v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhsz2xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI130_0
+; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI130_0]
+; CHECK-GI-NEXT: cmhs v0.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp uge <2 x i32> %A, <i32 2, i32 2>
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @cmhsz4xi32(<4 x i32> %A) {
-; CHECK-LABEL: cmhsz4xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.4s, #2
-; CHECK-NEXT: cmhs v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhsz4xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.4s, #2
+; CHECK-SD-NEXT: cmhs v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhsz4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI131_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI131_0]
-; GISEL-NEXT: cmhs v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhsz4xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI131_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI131_0]
+; CHECK-GI-NEXT: cmhs v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp uge <4 x i32> %A, <i32 2, i32 2, i32 2, i32 2>
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @cmhsz2xi64(<2 x i64> %A) {
-; CHECK-LABEL: cmhsz2xi64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #2
-; CHECK-NEXT: dup v1.2d, x8
-; CHECK-NEXT: cmhs v0.2d, v0.2d, v1.2d
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhsz2xi64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #2 // =0x2
+; CHECK-SD-NEXT: dup v1.2d, x8
+; CHECK-SD-NEXT: cmhs v0.2d, v0.2d, v1.2d
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhsz2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI132_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI132_0]
-; GISEL-NEXT: cmhs v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhsz2xi64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI132_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI132_0]
+; CHECK-GI-NEXT: cmhs v0.2d, v0.2d, v1.2d
+; CHECK-GI-NEXT: ret
%tmp3 = icmp uge <2 x i64> %A, <i64 2, i64 2>
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2152,127 +1795,127 @@ define <2 x i64> @cmhsz2xi64(<2 x i64> %A) {
define <8 x i8> @cmhiz8xi8(<8 x i8> %A) {
-; CHECK-LABEL: cmhiz8xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.8b, #1
-; CHECK-NEXT: cmhi v0.8b, v0.8b, v1.8b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhiz8xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.8b, #1
+; CHECK-SD-NEXT: cmhi v0.8b, v0.8b, v1.8b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhiz8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI133_0
-; GISEL-NEXT: ldr d1, [x8, :lo12:.LCPI133_0]
-; GISEL-NEXT: cmhi v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhiz8xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI133_0
+; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI133_0]
+; CHECK-GI-NEXT: cmhi v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ugt <8 x i8> %A, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
}
define <16 x i8> @cmhiz16xi8(<16 x i8> %A) {
-; CHECK-LABEL: cmhiz16xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.16b, #1
-; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhiz16xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.16b, #1
+; CHECK-SD-NEXT: cmhi v0.16b, v0.16b, v1.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhiz16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI134_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI134_0]
-; GISEL-NEXT: cmhi v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhiz16xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI134_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI134_0]
+; CHECK-GI-NEXT: cmhi v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ugt <16 x i8> %A, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
}
define <4 x i16> @cmhiz4xi16(<4 x i16> %A) {
-; CHECK-LABEL: cmhiz4xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.4h, #1
-; CHECK-NEXT: cmhi v0.4h, v0.4h, v1.4h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhiz4xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.4h, #1
+; CHECK-SD-NEXT: cmhi v0.4h, v0.4h, v1.4h
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhiz4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI135_0
-; GISEL-NEXT: ldr d1, [x8, :lo12:.LCPI135_0]
-; GISEL-NEXT: cmhi v0.4h, v0.4h, v1.4h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhiz4xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI135_0
+; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI135_0]
+; CHECK-GI-NEXT: cmhi v0.4h, v0.4h, v1.4h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ugt <4 x i16> %A, <i16 1, i16 1, i16 1, i16 1>
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
}
define <8 x i16> @cmhiz8xi16(<8 x i16> %A) {
-; CHECK-LABEL: cmhiz8xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.8h, #1
-; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhiz8xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.8h, #1
+; CHECK-SD-NEXT: cmhi v0.8h, v0.8h, v1.8h
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhiz8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI136_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI136_0]
-; GISEL-NEXT: cmhi v0.8h, v0.8h, v1.8h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhiz8xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI136_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI136_0]
+; CHECK-GI-NEXT: cmhi v0.8h, v0.8h, v1.8h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ugt <8 x i16> %A, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
}
define <2 x i32> @cmhiz2xi32(<2 x i32> %A) {
-; CHECK-LABEL: cmhiz2xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.2s, #1
-; CHECK-NEXT: cmhi v0.2s, v0.2s, v1.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhiz2xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.2s, #1
+; CHECK-SD-NEXT: cmhi v0.2s, v0.2s, v1.2s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhiz2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI137_0
-; GISEL-NEXT: ldr d1, [x8, :lo12:.LCPI137_0]
-; GISEL-NEXT: cmhi v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhiz2xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI137_0
+; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI137_0]
+; CHECK-GI-NEXT: cmhi v0.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ugt <2 x i32> %A, <i32 1, i32 1>
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @cmhiz4xi32(<4 x i32> %A) {
-; CHECK-LABEL: cmhiz4xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.4s, #1
-; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhiz4xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.4s, #1
+; CHECK-SD-NEXT: cmhi v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhiz4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI138_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI138_0]
-; GISEL-NEXT: cmhi v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhiz4xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI138_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI138_0]
+; CHECK-GI-NEXT: cmhi v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ugt <4 x i32> %A, <i32 1, i32 1, i32 1, i32 1>
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @cmhiz2xi64(<2 x i64> %A) {
-; CHECK-LABEL: cmhiz2xi64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #1
-; CHECK-NEXT: dup v1.2d, x8
-; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmhiz2xi64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #1 // =0x1
+; CHECK-SD-NEXT: dup v1.2d, x8
+; CHECK-SD-NEXT: cmhi v0.2d, v0.2d, v1.2d
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmhiz2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI139_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI139_0]
-; GISEL-NEXT: cmhi v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmhiz2xi64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI139_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI139_0]
+; CHECK-GI-NEXT: cmhi v0.2d, v0.2d, v1.2d
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ugt <2 x i64> %A, <i64 1, i64 1>
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2285,12 +1928,6 @@ define <8 x i8> @cmlsz8xi8(<8 x i8> %A) {
; CHECK-NEXT: movi v1.2d, #0000000000000000
; CHECK-NEXT: cmhs v0.8b, v1.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlsz8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmhs v0.8b, v1.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = icmp ule <8 x i8> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -2303,12 +1940,6 @@ define <16 x i8> @cmlsz16xi8(<16 x i8> %A) {
; CHECK-NEXT: movi v1.2d, #0000000000000000
; CHECK-NEXT: cmhs v0.16b, v1.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlsz16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmhs v0.16b, v1.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = icmp ule <16 x i8> %A, zeroinitializer;
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -2321,12 +1952,6 @@ define <4 x i16> @cmlsz4xi16(<4 x i16> %A) {
; CHECK-NEXT: movi v1.2d, #0000000000000000
; CHECK-NEXT: cmhs v0.4h, v1.4h, v0.4h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlsz4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmhs v0.4h, v1.4h, v0.4h
-; GISEL-NEXT: ret
%tmp3 = icmp ule <4 x i16> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -2339,12 +1964,6 @@ define <8 x i16> @cmlsz8xi16(<8 x i16> %A) {
; CHECK-NEXT: movi v1.2d, #0000000000000000
; CHECK-NEXT: cmhs v0.8h, v1.8h, v0.8h
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlsz8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmhs v0.8h, v1.8h, v0.8h
-; GISEL-NEXT: ret
%tmp3 = icmp ule <8 x i16> %A, zeroinitializer;
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -2357,12 +1976,6 @@ define <2 x i32> @cmlsz2xi32(<2 x i32> %A) {
; CHECK-NEXT: movi v1.2d, #0000000000000000
; CHECK-NEXT: cmhs v0.2s, v1.2s, v0.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlsz2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmhs v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
%tmp3 = icmp ule <2 x i32> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2375,12 +1988,6 @@ define <4 x i32> @cmlsz4xi32(<4 x i32> %A) {
; CHECK-NEXT: movi v1.2d, #0000000000000000
; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlsz4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmhs v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
%tmp3 = icmp ule <4 x i32> %A, zeroinitializer;
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -2393,12 +2000,6 @@ define <2 x i64> @cmlsz2xi64(<2 x i64> %A) {
; CHECK-NEXT: movi v1.2d, #0000000000000000
; CHECK-NEXT: cmhs v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cmlsz2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: movi v1.2d, #0000000000000000
-; GISEL-NEXT: cmhs v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
%tmp3 = icmp ule <2 x i64> %A, zeroinitializer;
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2406,18 +2007,18 @@ define <2 x i64> @cmlsz2xi64(<2 x i64> %A) {
; LO implemented as HI, so check reversed operands.
define <8 x i8> @cmloz8xi8(<8 x i8> %A) {
-; CHECK-LABEL: cmloz8xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.8b, #2
-; CHECK-NEXT: cmhi v0.8b, v1.8b, v0.8b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmloz8xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.8b, #2
+; CHECK-SD-NEXT: cmhi v0.8b, v1.8b, v0.8b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmloz8xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI147_0
-; GISEL-NEXT: ldr d1, [x8, :lo12:.LCPI147_0]
-; GISEL-NEXT: cmhi v0.8b, v1.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmloz8xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI147_0
+; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI147_0]
+; CHECK-GI-NEXT: cmhi v0.8b, v1.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ult <8 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
%tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
ret <8 x i8> %tmp4
@@ -2425,18 +2026,18 @@ define <8 x i8> @cmloz8xi8(<8 x i8> %A) {
; LO implemented as HI, so check reversed operands.
define <16 x i8> @cmloz16xi8(<16 x i8> %A) {
-; CHECK-LABEL: cmloz16xi8:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.16b, #2
-; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmloz16xi8:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.16b, #2
+; CHECK-SD-NEXT: cmhi v0.16b, v1.16b, v0.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmloz16xi8:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI148_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI148_0]
-; GISEL-NEXT: cmhi v0.16b, v1.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmloz16xi8:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI148_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI148_0]
+; CHECK-GI-NEXT: cmhi v0.16b, v1.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ult <16 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
%tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
ret <16 x i8> %tmp4
@@ -2444,18 +2045,18 @@ define <16 x i8> @cmloz16xi8(<16 x i8> %A) {
; LO implemented as HI, so check reversed operands.
define <4 x i16> @cmloz4xi16(<4 x i16> %A) {
-; CHECK-LABEL: cmloz4xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.4h, #2
-; CHECK-NEXT: cmhi v0.4h, v1.4h, v0.4h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmloz4xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.4h, #2
+; CHECK-SD-NEXT: cmhi v0.4h, v1.4h, v0.4h
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmloz4xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI149_0
-; GISEL-NEXT: ldr d1, [x8, :lo12:.LCPI149_0]
-; GISEL-NEXT: cmhi v0.4h, v1.4h, v0.4h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmloz4xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI149_0
+; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI149_0]
+; CHECK-GI-NEXT: cmhi v0.4h, v1.4h, v0.4h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ult <4 x i16> %A, <i16 2, i16 2, i16 2, i16 2>
%tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
ret <4 x i16> %tmp4
@@ -2463,18 +2064,18 @@ define <4 x i16> @cmloz4xi16(<4 x i16> %A) {
; LO implemented as HI, so check reversed operands.
define <8 x i16> @cmloz8xi16(<8 x i16> %A) {
-; CHECK-LABEL: cmloz8xi16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.8h, #2
-; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmloz8xi16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.8h, #2
+; CHECK-SD-NEXT: cmhi v0.8h, v1.8h, v0.8h
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmloz8xi16:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI150_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI150_0]
-; GISEL-NEXT: cmhi v0.8h, v1.8h, v0.8h
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmloz8xi16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI150_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI150_0]
+; CHECK-GI-NEXT: cmhi v0.8h, v1.8h, v0.8h
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ult <8 x i16> %A, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
%tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
ret <8 x i16> %tmp4
@@ -2482,18 +2083,18 @@ define <8 x i16> @cmloz8xi16(<8 x i16> %A) {
; LO implemented as HI, so check reversed operands.
define <2 x i32> @cmloz2xi32(<2 x i32> %A) {
-; CHECK-LABEL: cmloz2xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.2s, #2
-; CHECK-NEXT: cmhi v0.2s, v1.2s, v0.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmloz2xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.2s, #2
+; CHECK-SD-NEXT: cmhi v0.2s, v1.2s, v0.2s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmloz2xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI151_0
-; GISEL-NEXT: ldr d1, [x8, :lo12:.LCPI151_0]
-; GISEL-NEXT: cmhi v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmloz2xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI151_0
+; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI151_0]
+; CHECK-GI-NEXT: cmhi v0.2s, v1.2s, v0.2s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ult <2 x i32> %A, <i32 2, i32 2>
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2501,18 +2102,18 @@ define <2 x i32> @cmloz2xi32(<2 x i32> %A) {
; LO implemented as HI, so check reversed operands.
define <4 x i32> @cmloz4xi32(<4 x i32> %A) {
-; CHECK-LABEL: cmloz4xi32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.4s, #2
-; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmloz4xi32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.4s, #2
+; CHECK-SD-NEXT: cmhi v0.4s, v1.4s, v0.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmloz4xi32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI152_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI152_0]
-; GISEL-NEXT: cmhi v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmloz4xi32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI152_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI152_0]
+; CHECK-GI-NEXT: cmhi v0.4s, v1.4s, v0.4s
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ult <4 x i32> %A, <i32 2, i32 2, i32 2, i32 2>
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -2520,19 +2121,19 @@ define <4 x i32> @cmloz4xi32(<4 x i32> %A) {
; LO implemented as HI, so check reversed operands.
define <2 x i64> @cmloz2xi64(<2 x i64> %A) {
-; CHECK-LABEL: cmloz2xi64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #2
-; CHECK-NEXT: dup v1.2d, x8
-; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: cmloz2xi64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #2 // =0x2
+; CHECK-SD-NEXT: dup v1.2d, x8
+; CHECK-SD-NEXT: cmhi v0.2d, v1.2d, v0.2d
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: cmloz2xi64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI153_0
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI153_0]
-; GISEL-NEXT: cmhi v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: cmloz2xi64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI153_0
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI153_0]
+; CHECK-GI-NEXT: cmhi v0.2d, v1.2d, v0.2d
+; CHECK-GI-NEXT: ret
%tmp3 = icmp ult <2 x i64> %A, <i64 2, i64 2>
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2543,11 +2144,6 @@ define <2 x i32> @fcmoeq2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeq2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = fcmp oeq <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2558,11 +2154,6 @@ define <4 x i32> @fcmoeq4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeq4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = fcmp oeq <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -2572,11 +2163,6 @@ define <2 x i64> @fcmoeq2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeq2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = fcmp oeq <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2587,11 +2173,6 @@ define <2 x i32> @fcmoge2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoge2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = fcmp oge <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2602,11 +2183,6 @@ define <4 x i32> @fcmoge4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoge4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = fcmp oge <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -2616,11 +2192,6 @@ define <2 x i64> @fcmoge2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoge2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = fcmp oge <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2631,11 +2202,6 @@ define <2 x i32> @fcmogt2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogt2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = fcmp ogt <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2646,11 +2212,6 @@ define <4 x i32> @fcmogt4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogt4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = fcmp ogt <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -2660,11 +2221,6 @@ define <2 x i64> @fcmogt2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogt2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = fcmp ogt <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2676,11 +2232,6 @@ define <2 x i32> @fcmole2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2s, v1.2s, v0.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmole2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
%tmp3 = fcmp ole <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2692,11 +2243,6 @@ define <4 x i32> @fcmole4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmole4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
%tmp3 = fcmp ole <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -2708,11 +2254,6 @@ define <2 x i64> @fcmole2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmole2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
%tmp3 = fcmp ole <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2724,11 +2265,6 @@ define <2 x i32> @fcmolt2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolt2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
%tmp3 = fcmp olt <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2740,11 +2276,6 @@ define <4 x i32> @fcmolt4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolt4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
%tmp3 = fcmp olt <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -2756,11 +2287,6 @@ define <2 x i64> @fcmolt2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolt2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
%tmp3 = fcmp olt <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2774,13 +2300,6 @@ define <2 x i32> @fcmone2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmone2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.2s, v0.2s, v1.2s
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: orr v0.8b, v0.8b, v2.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp one <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2794,13 +2313,6 @@ define <4 x i32> @fcmone4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmone4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.4s, v0.4s, v1.4s
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp one <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -2815,13 +2327,6 @@ define <2 x i64> @fcmone2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmone2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.2d, v0.2d, v1.2d
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp one <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2835,13 +2340,6 @@ define <2 x i32> @fcmord2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmord2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.2s, v0.2s, v1.2s
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: orr v0.8b, v0.8b, v2.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp ord <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2855,13 +2353,6 @@ define <4 x i32> @fcmord4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmord4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.4s, v0.4s, v1.4s
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ord <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -2875,13 +2366,6 @@ define <2 x i64> @fcmord2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmord2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.2d, v0.2d, v1.2d
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ord <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2897,14 +2381,6 @@ define <2 x i32> @fcmuno2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmuno2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.2s, v0.2s, v1.2s
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: orr v0.8b, v0.8b, v2.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp uno <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2919,14 +2395,6 @@ define <4 x i32> @fcmuno4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmuno4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.4s, v0.4s, v1.4s
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp uno <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -2941,14 +2409,6 @@ define <2 x i64> @fcmuno2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmuno2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.2d, v0.2d, v1.2d
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp uno <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -2963,14 +2423,6 @@ define <2 x i32> @fcmueq2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmueq2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.2s, v0.2s, v1.2s
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: orr v0.8b, v0.8b, v2.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp ueq <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -2985,14 +2437,6 @@ define <4 x i32> @fcmueq4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmueq4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.4s, v0.4s, v1.4s
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ueq <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3007,14 +2451,6 @@ define <2 x i64> @fcmueq2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmueq2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.2d, v0.2d, v1.2d
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ueq <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3027,12 +2463,6 @@ define <2 x i32> @fcmuge2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmuge2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp uge <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3045,12 +2475,6 @@ define <4 x i32> @fcmuge4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmuge4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp uge <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3063,12 +2487,6 @@ define <2 x i64> @fcmuge2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmuge2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp uge <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3081,12 +2499,6 @@ define <2 x i32> @fcmugt2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: fcmge v0.2s, v1.2s, v0.2s
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmugt2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp ugt <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3099,12 +2511,6 @@ define <4 x i32> @fcmugt4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmugt4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ugt <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3116,12 +2522,6 @@ define <2 x i64> @fcmugt2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: fcmge v0.2d, v1.2d, v0.2d
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmugt2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ugt <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3134,12 +2534,6 @@ define <2 x i32> @fcmule2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: fcmgt v0.2s, v0.2s, v1.2s
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmule2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp ule <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3152,12 +2546,6 @@ define <4 x i32> @fcmule4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: fcmgt v0.4s, v0.4s, v1.4s
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmule4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ule <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3170,12 +2558,6 @@ define <2 x i64> @fcmule2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: fcmgt v0.2d, v0.2d, v1.2d
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmule2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ule <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3188,12 +2570,6 @@ define <2 x i32> @fcmult2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: fcmge v0.2s, v0.2s, v1.2s
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmult2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp ult <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3206,12 +2582,6 @@ define <4 x i32> @fcmult4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: fcmge v0.4s, v0.4s, v1.4s
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmult4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ult <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3224,12 +2594,6 @@ define <2 x i64> @fcmult2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: fcmge v0.2d, v0.2d, v1.2d
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmult2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ult <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3242,12 +2606,6 @@ define <2 x i32> @fcmune2xfloat(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmune2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp une <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3260,12 +2618,6 @@ define <4 x i32> @fcmune4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmune4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp une <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3278,12 +2630,6 @@ define <2 x i64> @fcmune2xdouble(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmune2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp une <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3294,11 +2640,6 @@ define <2 x i32> @fcmoeqz2xfloat(<2 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeqz2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2s, v0.2s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp oeq <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3309,11 +2650,6 @@ define <4 x i32> @fcmoeqz4xfloat(<4 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeqz4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.4s, v0.4s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp oeq <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3323,11 +2659,6 @@ define <2 x i64> @fcmoeqz2xdouble(<2 x double> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeqz2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2d, v0.2d, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp oeq <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3339,11 +2670,6 @@ define <2 x i32> @fcmogez2xfloat(<2 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2s, v0.2s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogez2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v0.2s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp oge <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3354,11 +2680,6 @@ define <4 x i32> @fcmogez4xfloat(<4 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.4s, v0.4s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogez4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v0.4s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp oge <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3368,11 +2689,6 @@ define <2 x i64> @fcmogez2xdouble(<2 x double> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2d, v0.2d, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogez2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v0.2d, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp oge <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3383,11 +2699,6 @@ define <2 x i32> @fcmogtz2xfloat(<2 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2s, v0.2s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogtz2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp ogt <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3398,11 +2709,6 @@ define <4 x i32> @fcmogtz4xfloat(<4 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogtz4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp ogt <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3412,11 +2718,6 @@ define <2 x i64> @fcmogtz2xdouble(<2 x double> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogtz2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp ogt <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3427,11 +2728,6 @@ define <2 x i32> @fcmoltz2xfloat(<2 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoltz2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp olt <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3442,11 +2738,6 @@ define <4 x i32> @fcmoltz4xfloat(<4 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoltz4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp olt <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3457,11 +2748,6 @@ define <2 x i64> @fcmoltz2xdouble(<2 x double> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoltz2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp olt <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3472,11 +2758,6 @@ define <2 x i32> @fcmolez2xfloat(<2 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmle v0.2s, v0.2s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolez2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.2s, v0.2s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp ole <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3487,11 +2768,6 @@ define <4 x i32> @fcmolez4xfloat(<4 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmle v0.4s, v0.4s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolez4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.4s, v0.4s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp ole <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3502,11 +2778,6 @@ define <2 x i64> @fcmolez2xdouble(<2 x double> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmle v0.2d, v0.2d, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolez2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.2d, v0.2d, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp ole <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3520,13 +2791,6 @@ define <2 x i32> @fcmonez2xfloat(<2 x float> %A) {
; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmonez2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.2s, v0.2s, #0.0
-; GISEL-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: orr v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp one <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3540,13 +2804,6 @@ define <4 x i32> @fcmonez4xfloat(<4 x float> %A) {
; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmonez4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.4s, v0.4s, #0.0
-; GISEL-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp one <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3560,13 +2817,6 @@ define <2 x i64> @fcmonez2xdouble(<2 x double> %A) {
; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmonez2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.2d, v0.2d, #0.0
-; GISEL-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp one <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3574,17 +2824,17 @@ define <2 x i64> @fcmonez2xdouble(<2 x double> %A) {
; ORD with zero = OLT | OGE
define <2 x i32> @fcmordz2xfloat(<2 x float> %A) {
-; CHECK-LABEL: fcmordz2xfloat:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v1.2s, v0.2s, #0.0
-; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmordz2xfloat:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v1.2s, v0.2s, #0.0
+; CHECK-SD-NEXT: fcmlt v0.2s, v0.2s, #0.0
+; CHECK-SD-NEXT: orr v0.8b, v0.8b, v1.8b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmordz2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2s, v0.2s, v0.2s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmordz2xfloat:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmeq v0.2s, v0.2s, v0.2s
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp ord <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3592,17 +2842,17 @@ define <2 x i32> @fcmordz2xfloat(<2 x float> %A) {
; ORD with zero = OLT | OGE
define <4 x i32> @fcmordz4xfloat(<4 x float> %A) {
-; CHECK-LABEL: fcmordz4xfloat:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v1.4s, v0.4s, #0.0
-; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmordz4xfloat:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v1.4s, v0.4s, #0.0
+; CHECK-SD-NEXT: fcmlt v0.4s, v0.4s, #0.0
+; CHECK-SD-NEXT: orr v0.16b, v0.16b, v1.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmordz4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.4s, v0.4s, v0.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmordz4xfloat:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmeq v0.4s, v0.4s, v0.4s
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp ord <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3610,17 +2860,17 @@ define <4 x i32> @fcmordz4xfloat(<4 x float> %A) {
; ORD with zero = OLT | OGE
define <2 x i64> @fcmordz2xdouble(<2 x double> %A) {
-; CHECK-LABEL: fcmordz2xdouble:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v1.2d, v0.2d, #0.0
-; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmordz2xdouble:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v1.2d, v0.2d, #0.0
+; CHECK-SD-NEXT: fcmlt v0.2d, v0.2d, #0.0
+; CHECK-SD-NEXT: orr v0.16b, v0.16b, v1.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmordz2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2d, v0.2d, v0.2d
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmordz2xdouble:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmeq v0.2d, v0.2d, v0.2d
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp ord <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3635,14 +2885,6 @@ define <2 x i32> @fcmueqz2xfloat(<2 x float> %A) {
; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmueqz2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.2s, v0.2s, #0.0
-; GISEL-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: orr v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp ueq <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3657,14 +2899,6 @@ define <4 x i32> @fcmueqz4xfloat(<4 x float> %A) {
; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmueqz4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.4s, v0.4s, #0.0
-; GISEL-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ueq <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3679,14 +2913,6 @@ define <2 x i64> @fcmueqz2xdouble(<2 x double> %A) {
; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmueqz2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.2d, v0.2d, #0.0
-; GISEL-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ueq <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3699,12 +2925,6 @@ define <2 x i32> @fcmugez2xfloat(<2 x float> %A) {
; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmugez2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp uge <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3717,12 +2937,6 @@ define <4 x i32> @fcmugez4xfloat(<4 x float> %A) {
; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmugez4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp uge <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3735,12 +2949,6 @@ define <2 x i64> @fcmugez2xdouble(<2 x double> %A) {
; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmugez2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp uge <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3753,12 +2961,6 @@ define <2 x i32> @fcmugtz2xfloat(<2 x float> %A) {
; CHECK-NEXT: fcmle v0.2s, v0.2s, #0.0
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmugtz2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.2s, v0.2s, #0.0
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp ugt <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3771,12 +2973,6 @@ define <4 x i32> @fcmugtz4xfloat(<4 x float> %A) {
; CHECK-NEXT: fcmle v0.4s, v0.4s, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmugtz4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.4s, v0.4s, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ugt <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3789,12 +2985,6 @@ define <2 x i64> @fcmugtz2xdouble(<2 x double> %A) {
; CHECK-NEXT: fcmle v0.2d, v0.2d, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmugtz2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.2d, v0.2d, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ugt <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3807,12 +2997,6 @@ define <2 x i32> @fcmultz2xfloat(<2 x float> %A) {
; CHECK-NEXT: fcmge v0.2s, v0.2s, #0.0
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmultz2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v0.2s, #0.0
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp ult <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3824,12 +3008,6 @@ define <4 x i32> @fcmultz4xfloat(<4 x float> %A) {
; CHECK-NEXT: fcmge v0.4s, v0.4s, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmultz4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v0.4s, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ult <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3841,12 +3019,6 @@ define <2 x i64> @fcmultz2xdouble(<2 x double> %A) {
; CHECK-NEXT: fcmge v0.2d, v0.2d, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmultz2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v0.2d, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ult <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3859,12 +3031,6 @@ define <2 x i32> @fcmulez2xfloat(<2 x float> %A) {
; CHECK-NEXT: fcmgt v0.2s, v0.2s, #0.0
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmulez2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp ule <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3877,12 +3043,6 @@ define <4 x i32> @fcmulez4xfloat(<4 x float> %A) {
; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmulez4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ule <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3895,12 +3055,6 @@ define <2 x i64> @fcmulez2xdouble(<2 x double> %A) {
; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmulez2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp ule <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3913,12 +3067,6 @@ define <2 x i32> @fcmunez2xfloat(<2 x float> %A) {
; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.0
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunez2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2s, v0.2s, #0.0
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp une <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3931,12 +3079,6 @@ define <4 x i32> @fcmunez4xfloat(<4 x float> %A) {
; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunez4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.4s, v0.4s, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp une <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -3949,12 +3091,6 @@ define <2 x i64> @fcmunez2xdouble(<2 x double> %A) {
; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunez2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2d, v0.2d, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp une <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -3969,14 +3105,6 @@ define <2 x i32> @fcmunoz2xfloat(<2 x float> %A) {
; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunoz2xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v1.2s, v0.2s, #0.0
-; GISEL-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: orr v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp uno <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -3991,14 +3119,6 @@ define <4 x i32> @fcmunoz4xfloat(<4 x float> %A) {
; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunoz4xfloat:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v1.4s, v0.4s, #0.0
-; GISEL-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp uno <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4013,14 +3133,6 @@ define <2 x i64> @fcmunoz2xdouble(<2 x double> %A) {
; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunoz2xdouble:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v1.2d, v0.2d, #0.0
-; GISEL-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp uno <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4032,11 +3144,6 @@ define <2 x i32> @fcmoeq2xfloat_fast(<2 x float> %A, <2 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeq2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oeq <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4047,11 +3154,6 @@ define <4 x i32> @fcmoeq4xfloat_fast(<4 x float> %A, <4 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeq4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oeq <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4061,11 +3163,6 @@ define <2 x i64> @fcmoeq2xdouble_fast(<2 x double> %A, <2 x double> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeq2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oeq <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4076,11 +3173,6 @@ define <2 x i32> @fcmoge2xfloat_fast(<2 x float> %A, <2 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoge2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oge <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4091,11 +3183,6 @@ define <4 x i32> @fcmoge4xfloat_fast(<4 x float> %A, <4 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoge4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oge <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4105,11 +3192,6 @@ define <2 x i64> @fcmoge2xdouble_fast(<2 x double> %A, <2 x double> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoge2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oge <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4120,11 +3202,6 @@ define <2 x i32> @fcmogt2xfloat_fast(<2 x float> %A, <2 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2s, v0.2s, v1.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogt2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ogt <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4135,11 +3212,6 @@ define <4 x i32> @fcmogt4xfloat_fast(<4 x float> %A, <4 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogt4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ogt <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4149,11 +3221,6 @@ define <2 x i64> @fcmogt2xdouble_fast(<2 x double> %A, <2 x double> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogt2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ogt <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4164,11 +3231,6 @@ define <2 x i32> @fcmole2xfloat_fast(<2 x float> %A, <2 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2s, v1.2s, v0.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmole2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ole <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4179,11 +3241,6 @@ define <4 x i32> @fcmole4xfloat_fast(<4 x float> %A, <4 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmole4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ole <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4194,11 +3251,6 @@ define <2 x i64> @fcmole2xdouble_fast(<2 x double> %A, <2 x double> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmole2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ole <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4209,11 +3261,6 @@ define <2 x i32> @fcmolt2xfloat_fast(<2 x float> %A, <2 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolt2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: ret
%tmp3 = fcmp fast olt <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4224,11 +3271,6 @@ define <4 x i32> @fcmolt4xfloat_fast(<4 x float> %A, <4 x float> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolt4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: ret
%tmp3 = fcmp fast olt <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4239,65 +3281,60 @@ define <2 x i64> @fcmolt2xdouble_fast(<2 x double> %A, <2 x double> %B) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolt2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: ret
%tmp3 = fcmp fast olt <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmone2xfloat_fast(<2 x float> %A, <2 x float> %B) {
-; CHECK-LABEL: fcmone2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s
-; CHECK-NEXT: mvn v0.8b, v0.8b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmone2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, v1.2s
+; CHECK-SD-NEXT: mvn v0.8b, v0.8b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmone2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.2s, v0.2s, v1.2s
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: orr v0.8b, v0.8b, v2.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmone2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v2.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s
+; CHECK-GI-NEXT: orr v0.8b, v0.8b, v2.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast one <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmone4xfloat_fast(<4 x float> %A, <4 x float> %B) {
-; CHECK-LABEL: fcmone4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: mvn v0.16b, v0.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmone4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: mvn v0.16b, v0.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmone4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.4s, v0.4s, v1.4s
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmone4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v2.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
+; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast one <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmone2xdouble_fast(<2 x double> %A, <2 x double> %B) {
-; CHECK-LABEL: fcmone2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d
-; CHECK-NEXT: mvn v0.16b, v0.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmone2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, v1.2d
+; CHECK-SD-NEXT: mvn v0.16b, v0.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmone2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.2d, v0.2d, v1.2d
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmone2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v2.2d, v0.2d, v1.2d
+; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d
+; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast one <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4310,13 +3347,6 @@ define <2 x i32> @fcmord2xfloat_fast(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmord2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.2s, v0.2s, v1.2s
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: orr v0.8b, v0.8b, v2.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ord <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4329,13 +3359,6 @@ define <4 x i32> @fcmord4xfloat_fast(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmord4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.4s, v0.4s, v1.4s
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ord <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4348,13 +3371,6 @@ define <2 x i64> @fcmord2xdouble_fast(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmord2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.2d, v0.2d, v1.2d
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ord <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4369,14 +3385,6 @@ define <2 x i32> @fcmuno2xfloat_fast(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmuno2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.2s, v0.2s, v1.2s
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: orr v0.8b, v0.8b, v2.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast uno <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4390,14 +3398,6 @@ define <4 x i32> @fcmuno4xfloat_fast(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmuno4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.4s, v0.4s, v1.4s
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast uno <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4411,260 +3411,252 @@ define <2 x i64> @fcmuno2xdouble_fast(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmuno2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v2.2d, v0.2d, v1.2d
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast uno <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmueq2xfloat_fast(<2 x float> %A, <2 x float> %B) {
-; CHECK-LABEL: fcmueq2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmueq2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, v1.2s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmueq2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.2s, v0.2s, v1.2s
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: orr v0.8b, v0.8b, v2.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmueq2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v2.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s
+; CHECK-GI-NEXT: orr v0.8b, v0.8b, v2.8b
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ueq <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmueq4xfloat_fast(<4 x float> %A, <4 x float> %B) {
-; CHECK-LABEL: fcmueq4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmueq4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmueq4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.4s, v0.4s, v1.4s
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmueq4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v2.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
+; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ueq <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmueq2xdouble_fast(<2 x double> %A, <2 x double> %B) {
-; CHECK-LABEL: fcmueq2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmueq2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, v1.2d
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmueq2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v2.2d, v0.2d, v1.2d
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: orr v0.16b, v0.16b, v2.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmueq2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v2.2d, v0.2d, v1.2d
+; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d
+; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ueq <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmuge2xfloat_fast(<2 x float> %A, <2 x float> %B) {
-; CHECK-LABEL: fcmuge2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v0.2s, v0.2s, v1.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmuge2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v0.2s, v0.2s, v1.2s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmuge2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmuge2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast uge <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmuge4xfloat_fast(<4 x float> %A, <4 x float> %B) {
-; CHECK-LABEL: fcmuge4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmuge4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmuge4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmuge4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast uge <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmuge2xdouble_fast(<2 x double> %A, <2 x double> %B) {
-; CHECK-LABEL: fcmuge2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v0.2d, v0.2d, v1.2d
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmuge2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v0.2d, v0.2d, v1.2d
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmuge2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmuge2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast uge <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
-
-define <2 x i32> @fcmugt2xfloat_fast(<2 x float> %A, <2 x float> %B) {
-; CHECK-LABEL: fcmugt2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmgt v0.2s, v0.2s, v1.2s
-; CHECK-NEXT: ret
+
+define <2 x i32> @fcmugt2xfloat_fast(<2 x float> %A, <2 x float> %B) {
+; CHECK-SD-LABEL: fcmugt2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmgt v0.2s, v0.2s, v1.2s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmugt2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v1.2s, v0.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmugt2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmge v0.2s, v1.2s, v0.2s
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ugt <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmugt4xfloat_fast(<4 x float> %A, <4 x float> %B) {
-; CHECK-LABEL: fcmugt4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmgt v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmugt4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmgt v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmugt4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v1.4s, v0.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmugt4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmge v0.4s, v1.4s, v0.4s
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ugt <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmugt2xdouble_fast(<2 x double> %A, <2 x double> %B) {
-; CHECK-LABEL: fcmugt2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmgt v0.2d, v0.2d, v1.2d
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmugt2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmgt v0.2d, v0.2d, v1.2d
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmugt2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v1.2d, v0.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmugt2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmge v0.2d, v1.2d, v0.2d
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ugt <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmule2xfloat_fast(<2 x float> %A, <2 x float> %B) {
-; CHECK-LABEL: fcmule2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v0.2s, v1.2s, v0.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmule2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v0.2s, v1.2s, v0.2s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmule2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmule2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v0.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ule <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmule4xfloat_fast(<4 x float> %A, <4 x float> %B) {
-; CHECK-LABEL: fcmule4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmule4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v0.4s, v1.4s, v0.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmule4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmule4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ule <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmule2xdouble_fast(<2 x double> %A, <2 x double> %B) {
-; CHECK-LABEL: fcmule2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v0.2d, v1.2d, v0.2d
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmule2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v0.2d, v1.2d, v0.2d
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmule2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmule2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v0.2d, v0.2d, v1.2d
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ule <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmult2xfloat_fast(<2 x float> %A, <2 x float> %B) {
-; CHECK-LABEL: fcmult2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmult2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmgt v0.2s, v1.2s, v0.2s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmult2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmult2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmge v0.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ult <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmult4xfloat_fast(<4 x float> %A, <4 x float> %B) {
-; CHECK-LABEL: fcmult4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmult4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmgt v0.4s, v1.4s, v0.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmult4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmult4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmge v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ult <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmult2xdouble_fast(<2 x double> %A, <2 x double> %B) {
-; CHECK-LABEL: fcmult2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmult2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmgt v0.2d, v1.2d, v0.2d
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmult2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmult2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmge v0.2d, v0.2d, v1.2d
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ult <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4676,12 +3668,6 @@ define <2 x i32> @fcmune2xfloat_fast(<2 x float> %A, <2 x float> %B) {
; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmune2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2s, v0.2s, v1.2s
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast une <2 x float> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4693,12 +3679,6 @@ define <4 x i32> @fcmune4xfloat_fast(<4 x float> %A, <4 x float> %B) {
; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmune4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast une <4 x float> %A, %B
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4710,12 +3690,6 @@ define <2 x i64> @fcmune2xdouble_fast(<2 x double> %A, <2 x double> %B) {
; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmune2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2d, v0.2d, v1.2d
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast une <2 x double> %A, %B
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4726,11 +3700,6 @@ define <2 x i32> @fcmoeqz2xfloat_fast(<2 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeqz2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2s, v0.2s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oeq <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4741,11 +3710,6 @@ define <4 x i32> @fcmoeqz4xfloat_fast(<4 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeqz4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.4s, v0.4s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oeq <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4755,11 +3719,6 @@ define <2 x i64> @fcmoeqz2xdouble_fast(<2 x double> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoeqz2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2d, v0.2d, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oeq <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4771,11 +3730,6 @@ define <2 x i32> @fcmogez2xfloat_fast(<2 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2s, v0.2s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogez2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v0.2s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oge <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4786,11 +3740,6 @@ define <4 x i32> @fcmogez4xfloat_fast(<4 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.4s, v0.4s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogez4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v0.4s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oge <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4800,11 +3749,6 @@ define <2 x i64> @fcmogez2xdouble_fast(<2 x double> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmge v0.2d, v0.2d, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogez2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v0.2d, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast oge <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4815,11 +3759,6 @@ define <2 x i32> @fcmogtz2xfloat_fast(<2 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2s, v0.2s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogtz2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ogt <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4830,11 +3769,6 @@ define <4 x i32> @fcmogtz4xfloat_fast(<4 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogtz4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ogt <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4844,11 +3778,6 @@ define <2 x i64> @fcmogtz2xdouble_fast(<2 x double> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmogtz2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ogt <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4859,11 +3788,6 @@ define <2 x i32> @fcmoltz2xfloat_fast(<2 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoltz2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast olt <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4874,11 +3798,6 @@ define <4 x i32> @fcmoltz4xfloat_fast(<4 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoltz4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast olt <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4889,11 +3808,6 @@ define <2 x i64> @fcmoltz2xdouble_fast(<2 x double> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmoltz2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast olt <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -4904,11 +3818,6 @@ define <2 x i32> @fcmolez2xfloat_fast(<2 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmle v0.2s, v0.2s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolez2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.2s, v0.2s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ole <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -4919,11 +3828,6 @@ define <4 x i32> @fcmolez4xfloat_fast(<4 x float> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmle v0.4s, v0.4s, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolez4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.4s, v0.4s, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ole <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -4934,314 +3838,309 @@ define <2 x i64> @fcmolez2xdouble_fast(<2 x double> %A) {
; CHECK: // %bb.0:
; CHECK-NEXT: fcmle v0.2d, v0.2d, #0.0
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmolez2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.2d, v0.2d, #0.0
-; GISEL-NEXT: ret
%tmp3 = fcmp fast ole <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmonez2xfloat_fast(<2 x float> %A) {
-; CHECK-LABEL: fcmonez2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.0
-; CHECK-NEXT: mvn v0.8b, v0.8b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmonez2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, #0.0
+; CHECK-SD-NEXT: mvn v0.8b, v0.8b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmonez2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.2s, v0.2s, #0.0
-; GISEL-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: orr v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmonez2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v1.2s, v0.2s, #0.0
+; CHECK-GI-NEXT: fcmlt v0.2s, v0.2s, #0.0
+; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast one <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmonez4xfloat_fast(<4 x float> %A) {
-; CHECK-LABEL: fcmonez4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.0
-; CHECK-NEXT: mvn v0.16b, v0.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmonez4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, #0.0
+; CHECK-SD-NEXT: mvn v0.16b, v0.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmonez4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.4s, v0.4s, #0.0
-; GISEL-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmonez4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v1.4s, v0.4s, #0.0
+; CHECK-GI-NEXT: fcmlt v0.4s, v0.4s, #0.0
+; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast one <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmonez2xdouble_fast(<2 x double> %A) {
-; CHECK-LABEL: fcmonez2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.0
-; CHECK-NEXT: mvn v0.16b, v0.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmonez2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, #0.0
+; CHECK-SD-NEXT: mvn v0.16b, v0.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmonez2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.2d, v0.2d, #0.0
-; GISEL-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmonez2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v1.2d, v0.2d, #0.0
+; CHECK-GI-NEXT: fcmlt v0.2d, v0.2d, #0.0
+; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast one <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmordz2xfloat_fast(<2 x float> %A) {
-; CHECK-LABEL: fcmordz2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v1.2s, v0.2s, #0.0
-; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmordz2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v1.2s, v0.2s, #0.0
+; CHECK-SD-NEXT: fcmlt v0.2s, v0.2s, #0.0
+; CHECK-SD-NEXT: orr v0.8b, v0.8b, v1.8b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmordz2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2s, v0.2s, v0.2s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmordz2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmeq v0.2s, v0.2s, v0.2s
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ord <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmordz4xfloat_fast(<4 x float> %A) {
-; CHECK-LABEL: fcmordz4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v1.4s, v0.4s, #0.0
-; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmordz4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v1.4s, v0.4s, #0.0
+; CHECK-SD-NEXT: fcmlt v0.4s, v0.4s, #0.0
+; CHECK-SD-NEXT: orr v0.16b, v0.16b, v1.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmordz4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.4s, v0.4s, v0.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmordz4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmeq v0.4s, v0.4s, v0.4s
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ord <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmordz2xdouble_fast(<2 x double> %A) {
-; CHECK-LABEL: fcmordz2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v1.2d, v0.2d, #0.0
-; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmordz2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v1.2d, v0.2d, #0.0
+; CHECK-SD-NEXT: fcmlt v0.2d, v0.2d, #0.0
+; CHECK-SD-NEXT: orr v0.16b, v0.16b, v1.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmordz2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2d, v0.2d, v0.2d
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmordz2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmeq v0.2d, v0.2d, v0.2d
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ord <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmueqz2xfloat_fast(<2 x float> %A) {
-; CHECK-LABEL: fcmueqz2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmueqz2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmueqz2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.2s, v0.2s, #0.0
-; GISEL-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: orr v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmueqz2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v1.2s, v0.2s, #0.0
+; CHECK-GI-NEXT: fcmlt v0.2s, v0.2s, #0.0
+; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ueq <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmueqz4xfloat_fast(<4 x float> %A) {
-; CHECK-LABEL: fcmueqz4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmueqz4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmueqz4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.4s, v0.4s, #0.0
-; GISEL-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmueqz4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v1.4s, v0.4s, #0.0
+; CHECK-GI-NEXT: fcmlt v0.4s, v0.4s, #0.0
+; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ueq <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmueqz2xdouble_fast(<2 x double> %A) {
-; CHECK-LABEL: fcmueqz2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmueqz2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmueqz2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v1.2d, v0.2d, #0.0
-; GISEL-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmueqz2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v1.2d, v0.2d, #0.0
+; CHECK-GI-NEXT: fcmlt v0.2d, v0.2d, #0.0
+; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ueq <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmugez2xfloat_fast(<2 x float> %A) {
-; CHECK-LABEL: fcmugez2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v0.2s, v0.2s, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmugez2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v0.2s, v0.2s, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmugez2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmugez2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmlt v0.2s, v0.2s, #0.0
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast uge <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmugez4xfloat_fast(<4 x float> %A) {
-; CHECK-LABEL: fcmugez4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v0.4s, v0.4s, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmugez4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v0.4s, v0.4s, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmugez4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmugez4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmlt v0.4s, v0.4s, #0.0
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast uge <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmugez2xdouble_fast(<2 x double> %A) {
-; CHECK-LABEL: fcmugez2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v0.2d, v0.2d, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmugez2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v0.2d, v0.2d, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmugez2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmugez2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmlt v0.2d, v0.2d, #0.0
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast uge <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmugtz2xfloat_fast(<2 x float> %A) {
-; CHECK-LABEL: fcmugtz2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmgt v0.2s, v0.2s, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmugtz2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmgt v0.2s, v0.2s, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmugtz2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.2s, v0.2s, #0.0
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmugtz2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmle v0.2s, v0.2s, #0.0
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ugt <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmugtz4xfloat_fast(<4 x float> %A) {
-; CHECK-LABEL: fcmugtz4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmugtz4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmgt v0.4s, v0.4s, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmugtz4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.4s, v0.4s, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmugtz4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmle v0.4s, v0.4s, #0.0
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ugt <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmugtz2xdouble_fast(<2 x double> %A) {
-; CHECK-LABEL: fcmugtz2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmugtz2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmgt v0.2d, v0.2d, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmugtz2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmle v0.2d, v0.2d, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmugtz2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmle v0.2d, v0.2d, #0.0
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ugt <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
}
define <2 x i32> @fcmultz2xfloat_fast(<2 x float> %A) {
-; CHECK-LABEL: fcmultz2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmultz2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmlt v0.2s, v0.2s, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmultz2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2s, v0.2s, #0.0
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmultz2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmge v0.2s, v0.2s, #0.0
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ult <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmultz4xfloat_fast(<4 x float> %A) {
-; CHECK-LABEL: fcmultz4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmultz4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmlt v0.4s, v0.4s, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmultz4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.4s, v0.4s, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmultz4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmge v0.4s, v0.4s, #0.0
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ult <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmultz2xdouble_fast(<2 x double> %A) {
-; CHECK-LABEL: fcmultz2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmultz2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmlt v0.2d, v0.2d, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmultz2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v0.2d, v0.2d, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmultz2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmge v0.2d, v0.2d, #0.0
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ult <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -5249,48 +4148,48 @@ define <2 x i64> @fcmultz2xdouble_fast(<2 x double> %A) {
; ULE with zero = !OGT
define <2 x i32> @fcmulez2xfloat_fast(<2 x float> %A) {
-; CHECK-LABEL: fcmulez2xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmle v0.2s, v0.2s, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmulez2xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmle v0.2s, v0.2s, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmulez2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmulez2xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v0.2s, v0.2s, #0.0
+; CHECK-GI-NEXT: mvn v0.8b, v0.8b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ule <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
}
define <4 x i32> @fcmulez4xfloat_fast(<4 x float> %A) {
-; CHECK-LABEL: fcmulez4xfloat_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmle v0.4s, v0.4s, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmulez4xfloat_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmle v0.4s, v0.4s, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmulez4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmulez4xfloat_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, #0.0
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ule <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
}
define <2 x i64> @fcmulez2xdouble_fast(<2 x double> %A) {
-; CHECK-LABEL: fcmulez2xdouble_fast:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmle v0.2d, v0.2d, #0.0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmulez2xdouble_fast:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmle v0.2d, v0.2d, #0.0
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmulez2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmulez2xdouble_fast:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v0.2d, v0.2d, #0.0
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ule <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -5302,12 +4201,6 @@ define <2 x i32> @fcmunez2xfloat_fast(<2 x float> %A) {
; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.0
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunez2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2s, v0.2s, #0.0
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast une <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -5319,12 +4212,6 @@ define <4 x i32> @fcmunez4xfloat_fast(<4 x float> %A) {
; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunez4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.4s, v0.4s, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast une <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -5336,12 +4223,6 @@ define <2 x i64> @fcmunez2xdouble_fast(<2 x double> %A) {
; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.0
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunez2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmeq v0.2d, v0.2d, #0.0
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast une <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -5355,14 +4236,6 @@ define <2 x i32> @fcmunoz2xfloat_fast(<2 x float> %A) {
; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
; CHECK-NEXT: mvn v0.8b, v0.8b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunoz2xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v1.2s, v0.2s, #0.0
-; GISEL-NEXT: fcmlt v0.2s, v0.2s, #0.0
-; GISEL-NEXT: orr v0.8b, v0.8b, v1.8b
-; GISEL-NEXT: mvn v0.8b, v0.8b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast uno <2 x float> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
ret <2 x i32> %tmp4
@@ -5376,14 +4249,6 @@ define <4 x i32> @fcmunoz4xfloat_fast(<4 x float> %A) {
; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunoz4xfloat_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v1.4s, v0.4s, #0.0
-; GISEL-NEXT: fcmlt v0.4s, v0.4s, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast uno <4 x float> %A, zeroinitializer
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -5397,14 +4262,6 @@ define <2 x i64> @fcmunoz2xdouble_fast(<2 x double> %A) {
; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
; CHECK-NEXT: mvn v0.16b, v0.16b
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: fcmunoz2xdouble_fast:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmge v1.2d, v0.2d, #0.0
-; GISEL-NEXT: fcmlt v0.2d, v0.2d, #0.0
-; GISEL-NEXT: orr v0.16b, v0.16b, v1.16b
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: ret
%tmp3 = fcmp fast uno <2 x double> %A, zeroinitializer
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
ret <2 x i64> %tmp4
@@ -5413,20 +4270,20 @@ define <2 x i64> @fcmunoz2xdouble_fast(<2 x double> %A) {
; Test SETCC fast-math flags are propagated when combining zext(setcc).
define <4 x i32> @fcmule4xfloat_fast_zext(<4 x float> %A, <4 x float> %B) {
-; CHECK-LABEL: fcmule4xfloat_fast_zext:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v2.4s, #1
-; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s
-; CHECK-NEXT: and v0.16b, v0.16b, v2.16b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmule4xfloat_fast_zext:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v2.4s, #1
+; CHECK-SD-NEXT: fcmge v0.4s, v1.4s, v0.4s
+; CHECK-SD-NEXT: and v0.16b, v0.16b, v2.16b
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmule4xfloat_fast_zext:
-; GISEL: // %bb.0:
-; GISEL-NEXT: adrp x8, .LCPI322_0
-; GISEL-NEXT: fcmgt v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI322_0]
-; GISEL-NEXT: bic v0.16b, v1.16b, v0.16b
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmule4xfloat_fast_zext:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI322_0
+; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI322_0]
+; CHECK-GI-NEXT: bic v0.16b, v1.16b, v0.16b
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ule <4 x float> %A, %B
%tmp4 = zext <4 x i1> %tmp3 to <4 x i32>
ret <4 x i32> %tmp4
@@ -5434,18 +4291,18 @@ define <4 x i32> @fcmule4xfloat_fast_zext(<4 x float> %A, <4 x float> %B) {
; Test SETCC fast-math flags are propagated when combining aext(setcc).
define <4 x i1> @fcmule4xfloat_fast_aext(<4 x float> %A, <4 x float> %B) {
-; CHECK-LABEL: fcmule4xfloat_fast_aext:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s
-; CHECK-NEXT: xtn v0.4h, v0.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fcmule4xfloat_fast_aext:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fcmge v0.4s, v1.4s, v0.4s
+; CHECK-SD-NEXT: xtn v0.4h, v0.4s
+; CHECK-SD-NEXT: ret
;
-; GISEL-LABEL: fcmule4xfloat_fast_aext:
-; GISEL: // %bb.0:
-; GISEL-NEXT: fcmgt v0.4s, v0.4s, v1.4s
-; GISEL-NEXT: mvn v0.16b, v0.16b
-; GISEL-NEXT: xtn v0.4h, v0.4s
-; GISEL-NEXT: ret
+; CHECK-GI-LABEL: fcmule4xfloat_fast_aext:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: mvn v0.16b, v0.16b
+; CHECK-GI-NEXT: xtn v0.4h, v0.4s
+; CHECK-GI-NEXT: ret
%tmp3 = fcmp fast ule <4 x float> %A, %B
ret <4 x i1> %tmp3
}
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