[PATCH] D156538: [AArch64] Try to combine FMUL with FDIV

[JinGu Kang via Phabricator via llvm-commits]

jaykang10 added a comment.

> Unfortunately I believe this will get stuck in loops some of the time. Try https://godbolt.org/z/c6badjcb1 for example, when it runs under Ofast.

Ah, Thanks for pointing out the `Ofast` option! I misunderstood one of your previous comments. I can see the loop between `tryCombineFMULWithFDIV` and `DAGCombiner::visitFDIV`.
I can see below comment for the precision on `DAGCombiner::visitFDIV`. That's what I want to check for this patch.

  SDValue DAGCombiner::visitFDIV(SDNode *N) {
  ...
    if (Options.UnsafeFPMath || Flags.hasAllowReciprocal()) {
      // fold (fdiv X, c2) -> fmul X, 1/c2 if losing precision is acceptable.
      if (auto *N1CFP = dyn_cast<ConstantFPSDNode>(N1)) 

Let me add a complex pattern with `Options.UnsafeFPMath || Flags.hasAllowReciprocal()`.


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https://reviews.llvm.org/D156538