[PATCH] D157515: [GlobalISel] Also set dead flags of implicit defs added by BuildMI

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh updated this revision to Diff 548912.
Pierre-vh marked 3 inline comments as done.
Pierre-vh added a comment.

Use implicit op idx

I don't use the true op idx because it's hard (impossible?) to tell from TableGen, considering we can have complex renderers & such.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157515/new/

https://reviews.llvm.org/D157515

Files:
  llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
  llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
  llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-swap-compare-operands.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-arith-extended-reg.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-arith-shifted-reg.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-binop.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-ptr-add.mir
  llvm/test/CodeGen/AArch64/GlobalISel/sext-inreg-ldrow-16b.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-abs.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-select.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
  llvm/test/CodeGen/X86/GlobalISel/select-ashr-scalar.mir
  llvm/test/CodeGen/X86/GlobalISel/select-blsi.mir
  llvm/test/CodeGen/X86/GlobalISel/select-blsr.mir
  llvm/test/CodeGen/X86/GlobalISel/select-brcond.mir
  llvm/test/CodeGen/X86/GlobalISel/select-cmp.mir
  llvm/test/CodeGen/X86/GlobalISel/select-constant.mir
  llvm/test/CodeGen/X86/GlobalISel/select-leaf-constant.mir
  llvm/test/CodeGen/X86/GlobalISel/select-lshr-scalar.mir
  llvm/test/CodeGen/X86/GlobalISel/select-phi.mir
  llvm/test/CodeGen/X86/GlobalISel/select-shl-scalar.mir
  llvm/test/CodeGen/X86/GlobalISel/x86_64-select-zext.mir
  llvm/test/CodeGen/X86/switch-bit-test-unreachable-default.ll
  llvm/utils/TableGen/GlobalISelMatchTable.cpp

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